Commit Graph

6 Commits

Author SHA1 Message Date
ager@chromium.org
74db440d9f MIPS: Fixed FPU rounding checks and related errors in the Simulator.
Removed some unnecessary shifts when reading FCSR error flags.
Fixed some FCSR-related bugs.
Fixed some un-related style issues.

With this commit, mips build is still broken. Two more commits to come.

BUG=
TEST=

Review URL: http://codereview.chromium.org/6993054
Patch from Paul Lind <plind44@gmail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8173 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-06-06 08:43:15 +00:00
sgjesse@chromium.org
64c610727d MIPS: Added the stop() instruction with same behavior as on Arm simulator.
The already working watchpoint break mechanism has been extended to handle "stop" instructions, with text messages.

Explanation (also in constants-mips.h):
On MIPS Simulator breakpoints can have different codes:
- Breaks between 0 and kMaxWatchpointCode are treated as simple watchpoints, the simulator will run through them and print the registers.
- Breaks between kMaxWatchpointCode and kMaxStopCode are treated as stop() instructions (see Assembler::stop()).
- Breaks larger than kMaxStopCode are simple breaks, dropping you into the debugger.

The current values are 31 for kMaxWatchpointCode and 127 for kMaxStopCode.
From the user's point of view this works the same way as the ARM stop instruction except for the break code usage detailed above.

Ported commits: r5723 (3ba78d24)

BUG=
TEST=

Review URL: http://codereview.chromium.org//7062014

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8069 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-05-26 07:46:18 +00:00
sgjesse@chromium.org
9891a057e1 MIPS: Update for 23-May commits, and a few older ones.
Make mips-specifc changes for r7999, r8001, r8002.

Also bring in changes for older commits 7203, 7279, 7693, 7715, 7788.

Mips changes for 7715 (Arm: Support hardfloat in SCons build), and
7693 (Implement hardfloat calling convention in macro assembler and simulator)
resulted in changes to SConstruct.

BUG=
TEST=

Review URL: http://codereview.chromium.org//6966031

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8022 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-05-24 07:23:32 +00:00
sgjesse@chromium.org
40172e6a7b Update mips infrastructure files.
- Merge to current tip of tree, fix build problems.
- Remove deprecated source files.
- Add cctest test-disasm-mips
- Consistently use single-reg push()/pop() (remove uppercase variants)
- Add assembler field accessors.
- More style fixes.

BUG=
TEST=

Review URL: http://codereview.chromium.org//6965006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7825 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-05-09 14:28:09 +00:00
sgjesse@chromium.org
2531480d10 Re-establish mips basic infrastructure.
This commit adds current working versions of assembler, macro-assembler,
disassembler, and simulator.

All other mips arch files are replaced with stubbed-out versions that
will build.

Arch independent files are updated as needed to support building and
running mips.

The only test is cctest/test-assembler-mips, and this passes on the
simulator and on mips hardware.

TEST=none
BUG=none

Patch by Paul Lind from MIPS.

Review URL: http://codereview.chromium.org/6730029/


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7388 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2011-03-28 13:05:36 +00:00
sgjesse@chromium.org
a6a7c75ae0 MIPS port initial commit
This is the first step in the MIPS port of V8. It adds assembler, disassembler and simulator for the MIPS32 architecture.

Contains stubbed out implementation of all the compiler/code generator infrastructure to make it all build.

Patch by Alexandre Rames from Sigma Designs Inc.

This is the landing of http://codereview.chromium.org/543161.
Review URL: http://codereview.chromium.org/561072

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3799 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-02-04 20:36:58 +00:00