AuroraMiddleware/v8
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16 Commits

Author SHA1 Message Date
lrn@chromium.org
b4fd72b335 Change native RegExp call code to properly set C++ structures and 
to handle exceptions on return from RegExp.

BUG=1108
TEST=

Review URL: http://codereview.chromium.org/6489001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6794 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-02-15 13:53:51 +00:00
whesse@chromium.org
a18f9d1114 Remove dependence of code-stubs on codegen, the virtual frame code generator. Move some functions used by code-stubs and full-codegen from codegen to macro-assembler. 
Review URL: http://codereview.chromium.org/3169049

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5370 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-08-30 11:48:07 +00:00
erik.corry@gmail.com
d0241c98c5 Remove the fledgling Thumb2 support since we are concentrating 
on other ways to make ARM code more compact.
Review URL: http://codereview.chromium.org/2080017

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4698 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-21 09:23:33 +00:00
sgjesse@chromium.org
ae4cc3c287 Add a flag to the ARM version of new space allocation in generated code 
The flag SIZE_IN_WORDS indicate that the requested size is in words and not in bytes, The default is to specify the size in bytes.
Review URL: http://codereview.chromium.org/2047002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4617 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-07 14:06:55 +00:00
vitalyr@chromium.org
d1d56d9891 ia32: Fuse map and type checks in call ICs for API functions. 
This uses the fact that if a map stayed the same then the object
still passes the type check. A new builtin is added to handle the
API call in this case.

Review URL: http://codereview.chromium.org/573003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3825 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-09 16:14:14 +00:00
sgjesse@chromium.org
a6a7c75ae0 MIPS port initial commit 
This is the first step in the MIPS port of V8. It adds assembler, disassembler and simulator for the MIPS32 architecture.

Contains stubbed out implementation of all the compiler/code generator infrastructure to make it all build.

Patch by Alexandre Rames from Sigma Designs Inc.

This is the landing of http://codereview.chromium.org/543161.
Review URL: http://codereview.chromium.org/561072

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3799 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-02-04 20:36:58 +00:00
erik.corry@gmail.com
264c055b2f Create the framework for adding a thumb2 backend for ARM. See http://codereview.chromium.org/464070 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3436 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-12-09 12:56:42 +00:00
sgjesse@chromium.org
b1a5bf4c5d Change the functions named AllocateObjectInNewSpace to AllocateInNewSpace. 
These functions just moves forward the new space allocation top, and in some situations they are used to reserve space for several objects.
Review URL: http://codereview.chromium.org/219030

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2993 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-30 09:24:46 +00:00
sgjesse@chromium.org
fe8a5ac59a Move common enums for macro assemblers. 
All macro-assembler-*.cc used a number of common enums. Moved these to macro-assembler.h.

Removed unused enum ExitJSFlag from ARM macro assembler.
Review URL: http://codereview.chromium.org/202004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2836 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-07 12:07:40 +00:00
iposva@chromium.org
f9dc709c72 - Add a "#error Unsupported target architecture." where needed. A chain of 
platform dependent ifdefs is useless if it does not include an error like
  this. You will end up searching for the failure in all the wrong places.
Review URL: http://codereview.chromium.org/150026

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2298 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-06-29 17:07:30 +00:00
deanm@chromium.org
2b56660a8b Introduce two separate classes of processor detection: 
- TARGET, the architecture we will generate code for.
  This is brought it from the build system.
- HOST, the architecture our C++ compiler is building for.
  This is detected automatically based on compiler defines.

This adds macros for 32 or 64 bit, and cleans up some
include conditionals, etc.

Review URL: http://codereview.chromium.org/99355


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1864 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-05-05 12:06:20 +00:00
lrn@chromium.org
ea56336518 Create build structure for X64. 
Possible to attempt to build for X64.
Build will be unsuccessful, since all x64 source files are
missing and pointers are reinterpreted as integers everywhere.

Review URL: http://codereview.chromium.org/99186


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1817 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-04-29 13:11:48 +00:00
lrn@chromium.org
a4d756a1c8 Move backend specific files to separate directories. 
Move ia32 and arm specific files to subdirectories to make it easier to add more backends.

Review URL: http://codereview.chromium.org/92068


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1782 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-04-23 12:06:38 +00:00
lrn@chromium.org
d7e5f97b1e Made ARM/IA32 handling in Regexp symmetric (although without an ARM implementation yet). 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@848 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2008-11-26 13:54:08 +00:00
christian.plesner.hansen@gmail.com
9bed566bdb Changed copyright header from google inc. to v8 project authors. 
Added presubmit step to check copyright.



git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@242 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2008-09-09 20:08:45 +00:00
christian.plesner.hansen
43d26ecc35 Initial export. 
git-svn-id: http://v8.googlecode.com/svn/trunk@2 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2008-07-03 15:10:15 +00:00