The already working watchpoint break mechanism has been extended to handle "stop" instructions, with text messages.
Explanation (also in constants-mips.h):
On MIPS Simulator breakpoints can have different codes:
- Breaks between 0 and kMaxWatchpointCode are treated as simple watchpoints, the simulator will run through them and print the registers.
- Breaks between kMaxWatchpointCode and kMaxStopCode are treated as stop() instructions (see Assembler::stop()).
- Breaks larger than kMaxStopCode are simple breaks, dropping you into the debugger.
The current values are 31 for kMaxWatchpointCode and 127 for kMaxStopCode.
From the user's point of view this works the same way as the ARM stop instruction except for the break code usage detailed above.
Ported commits: r5723 (3ba78d24)
BUG=
TEST=
Review URL: http://codereview.chromium.org//7062014
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8069 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Port of r8040 to mips.
Original commit message:
Strict mode functions are to get 'undefined' as the receiver when
called with an implicit receiver. Modes are bad! It forces us to have
checks on all function calls.
This change attempts to limit the cost by passing information about
whether or not a call is with an implicit or explicit receiver in ecx
as part of the calling convention. The cost is setting ecx on all
calls and checking ecx on entry to strict mode functions.
Implicit/explicit receiver state has to be maintained by ICs. Various
stubs have to not clobber ecx or save and restore it.
CallFunction stub needs to check if the receiver is implicit when it
doesn't know from the context.
BUG=
TEST=
Review URL: http://codereview.chromium.org/6992051
Patch from Paul Lind <plind44@gmail.com>.
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8050 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Make mips-specifc changes for r7999, r8001, r8002.
Also bring in changes for older commits 7203, 7279, 7693, 7715, 7788.
Mips changes for 7715 (Arm: Support hardfloat in SCons build), and
7693 (Implement hardfloat calling convention in macro assembler and simulator)
resulted in changes to SConstruct.
BUG=
TEST=
Review URL: http://codereview.chromium.org//6966031
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8022 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Updated to include fixes to several mips arch-specific files, corresponding to recent changes in r7944, r7935, r7926, r7914, r7910, r7895, and parts of r7423, which had previously been missed for mips. Rebased on r7964.
The simulator changes were missed on r7893 for code-stubs-mips,
where the DirectCEntry stuff was added.
There are also a couple small changes to builtins-mips following
r7879 for the other architectures.
BUG=
TEST=
Review URL: http://codereview.chromium.org//7042031
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7977 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This submission required a small change to arch-indep code to declare
code stub DirectCEntry for mips.
It also required updates to macro-assembler-mips.cc & h and frames-mips.h.
I also made a small change to frames-mips.cc.
This code submission will compile, but is not testable until the majority
of the mips port is in place. It has been tested externally.
BUG=
TEST=
Review URL: http://codereview.chromium.org//7034008
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7893 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit adds current working versions of assembler, macro-assembler,
disassembler, and simulator.
All other mips arch files are replaced with stubbed-out versions that
will build.
Arch independent files are updated as needed to support building and
running mips.
The only test is cctest/test-assembler-mips, and this passes on the
simulator and on mips hardware.
TEST=none
BUG=none
Patch by Paul Lind from MIPS.
Review URL: http://codereview.chromium.org/6730029/
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7388 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
