AuroraMiddleware/v8
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4 Commits

Author SHA1 Message Date
rodolph.perfetta@arm.com
4d895bd217 ARM64: Refactor instruction selection unit tests. 
BUG=
R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/475823002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23188 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-19 10:14:29 +00:00
bmeurer@chromium.org
cf51230881 [turbofan] Add proper conversion operators for int32<->int64. 
This affects arm64 and x64. Note that we do not yet optimize
these conversions. Later we will add support for merging these
conversion operators into other operations during instruction
selection.

TEST=cctest,compiler-unittests
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/487723002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23184 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-19 08:48:41 +00:00
titzer@chromium.org
9803a72417 Unify MachineType and RepType. 
MachineType now tracks both the representation and the value type of machine quantities and is used uniformly throughout TurboFan.

These types can now express uint8, int8, uint16, and int16, i.e. signed and unsigned smallish integers. Note that currently only uint8 and uint16 are implemented in the TF backends.

R=bmeurer@chromium.org, mstarzinger@chromium.org
BUG=

Review URL: https://codereview.chromium.org/470593002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23122 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-14 09:19:54 +00:00
bmeurer@chromium.org
f4b5224ae9 [turbofan] Refactor the InstructionSelector tests. 
Also fix some issues and improve test coverage.

TEST=compiler-unittests
BUG=v8:3489
LOG=y
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/469743002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23111 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2014-08-14 06:33:50 +00:00