Commit Graph

39 Commits

Author SHA1 Message Date
Martyn Capewell
a33945a1a1 [arm64] Support CSDB instruction
Add support for CSDB, equivalent to HINT #20, in the system instruction space.

Additionally, relax the "unallocated" identification of hint instructions that
we don't support, such that they'll now disassemble as "unimplemented (System)"
rather than "unallocated".

Change-Id: Ia36d13fe17a98edb872f234e7cdda33d033618e8
Reviewed-on: https://chromium-review.googlesource.com/926806
Reviewed-by: Ross McIlroy <rmcilroy@chromium.org>
Commit-Queue: Martyn Capewell <martyn.capewell@arm.com>
Cr-Commit-Position: refs/heads/master@{#51420}
2018-02-21 10:33:32 +00:00
Martyn Capewell
7f6355cf6d [arm64] Remove remains of jssp
Remove remaining references to jssp, and return register to the allocator.

Bug: v8:6644
Change-Id: Ia6938e6c9548cd45d8c9c12032920b32d3da3c4c
Reviewed-on: https://chromium-review.googlesource.com/866747
Reviewed-by: Benedikt Meurer <bmeurer@chromium.org>
Commit-Queue: Martyn Capewell <martyn.capewell@arm.com>
Cr-Commit-Position: refs/heads/master@{#50613}
2018-01-16 10:45:13 +00:00
Julien Brianceau
b41f857b9e Fix common misspellings
Bug: chromium:750830
Cq-Include-Trybots: master.tryserver.blink:linux_trusty_blink_rel;master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng
Change-Id: Icab7b5a1c469d5e77d04df8bfca8319784e92af4
Reviewed-on: https://chromium-review.googlesource.com/595655
Commit-Queue: Julien Brianceau <jbriance@cisco.com>
Reviewed-by: Yang Guo <yangguo@chromium.org>
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: Daniel Ehrenberg <littledan@chromium.org>
Cr-Commit-Position: refs/heads/master@{#47072}
2017-08-02 09:35:28 +00:00
martyn.capewell
fc3f29d329 Reland of Reland of "ARM64: Add NEON support"
This reverts commit c5aad5f284
The CL was reverted due to missing Chromium dependencies.

This commit removes the simulator trace-based tests, and the associated header file dependencies, previously pulled in by DEPS. The NEON support now has only hand-written tests, in test-assembler-arm64.cc. The remaining tests can be added in a later patch.

BUG=chromium:718439

Original issue's description:
> Reland "ARM64: Add NEON support"
>
> This reverts commit cc047635ff.
> The CL was reverted due to a missing DEPS mirror.
>
> Original issue's description:
> > ARM64: Add NEON support
> >
> > Add assembler, disassembler and simulator support for NEON in the ARM64 backend.
> >
> > BUG=
> >
> > Review-Url: https://codereview.chromium.org/2622643005
> > Cr-Commit-Position: refs/heads/master@{#44306}
>
> BUG=
>
> Review-Url: https://codereview.chromium.org/2812573003
> Cr-Commit-Position: refs/heads/master@{#44652}

Review-Url: https://codereview.chromium.org/2896303003
Cr-Commit-Position: refs/heads/master@{#45633}
2017-05-31 13:58:43 +00:00
Wiktor Garbacz
9a8efd8a4e [cleanup] Remove return after UNREACHABLE
Change-Id: I20ed35a7fb5104a9cc66bb54fa8966589c43d7f9
Reviewed-on: https://chromium-review.googlesource.com/507287
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Reviewed-by: Benedikt Meurer <bmeurer@chromium.org>
Reviewed-by: Daniel Clifford <danno@chromium.org>
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Marja Hölttä <marja@chromium.org>
Reviewed-by: Jochen Eisinger <jochen@chromium.org>
Commit-Queue: Wiktor Garbacz <wiktorg@google.com>
Cr-Commit-Position: refs/heads/master@{#45458}
2017-05-22 13:10:01 +00:00
hablich
c5aad5f284 Revert "Reland "ARM64: Add NEON support""
This reverts commit 8faf3d6f25.

Reason: blocks roll https://codereview.chromium.org/2820753003/

TBR=martyn.capewell@arm.com,jarin@chromium.org,bmeurer@chromium.org,machenbach@chromium.org

NOTRY=true

Review-Url: https://codereview.chromium.org/2819093002
Cr-Commit-Position: refs/heads/master@{#44660}
2017-04-15 10:27:17 +00:00
martyn.capewell
8faf3d6f25 Reland "ARM64: Add NEON support"
This reverts commit cc047635ff.
The CL was reverted due to a missing DEPS mirror.

Original issue's description:
> ARM64: Add NEON support
>
> Add assembler, disassembler and simulator support for NEON in the ARM64 backend.
>
> BUG=
>
> Review-Url: https://codereview.chromium.org/2622643005
> Cr-Commit-Position: refs/heads/master@{#44306}

BUG=

Review-Url: https://codereview.chromium.org/2812573003
Cr-Commit-Position: refs/heads/master@{#44652}
2017-04-13 17:23:15 +00:00
machenbach
cc047635ff Revert "ARM64: Add NEON support"
This reverts commit 4506382dce.

We don't allow DEPS'ing things outside googlesource. This requires a
mirror. Also .gitignore entry is missing.

NOTRY=true
NOTREECHECKS=true
NOPRESUBMIT=true
TBR=bmeurer@chromium.org

Review-Url: https://codereview.chromium.org/2785183005
Cr-Commit-Position: refs/heads/master@{#44307}
2017-03-31 12:33:57 +00:00
martyn.capewell
4506382dce ARM64: Add NEON support
Add assembler, disassembler and simulator support for NEON in the ARM64 backend.

BUG=

Review-Url: https://codereview.chromium.org/2622643005
Cr-Commit-Position: refs/heads/master@{#44306}
2017-03-31 11:33:02 +00:00
martyn.capewell
630c33c6f4 [arm64] Use acquire/release memory accesses for atomics
Implement ASSEMBLE_ATOMIC_LOAD/STORE_INTEGER using acquire/release instructions,
to match the existing ASSEMBLE_ATOMIC_EXCHANGE_INTEGER macro.

BUG=v8:6097

Review-Url: https://codereview.chromium.org/2760963002
Cr-Commit-Position: refs/heads/master@{#44184}
2017-03-28 10:06:58 +00:00
aseemgarg
048a0a13e7 Revert "Revert of [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator (patchset #8 id:140001 of https://codereview.chromium.org/2711473002/ )"
This reverts commit 2362f869a4.

BUG=v8:4614

Review-Url: https://codereview.chromium.org/2720133004
Cr-Commit-Position: refs/heads/master@{#43467}
2017-02-28 03:31:39 +00:00
littledan
2362f869a4 Revert of [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator (patchset #8 id:140001 of https://codereview.chromium.org/2711473002/ )
Reason for revert:
The tree is closed due to an msan violation (use of uninitialized value) in the arm64 simulator soon after this patch landed; this seems related

https://build.chromium.org/p/client.v8/builders/V8%20Linux%20-%20arm64%20-%20sim%20-%20MSAN/builds/13607/steps/Check/logs/simulator_invalidate_..

Original issue's description:
> [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator
>
> BUG=v8:4614
> R=binji@chromium.org
>
> Review-Url: https://codereview.chromium.org/2711473002
> Cr-Commit-Position: refs/heads/master@{#43461}
> Committed: a2a2c1b9ee

TBR=binji@chromium.org,jarin@chromium.org,jacob.bramley@arm.com,aseemgarg@chromium.org
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=v8:4614

Review-Url: https://codereview.chromium.org/2720133003
Cr-Commit-Position: refs/heads/master@{#43463}
2017-02-27 22:47:14 +00:00
aseemgarg
a2a2c1b9ee [Atomics] Implement ldaxr/stlxr instructions in ARM64 simulator
BUG=v8:4614
R=binji@chromium.org

Review-Url: https://codereview.chromium.org/2711473002
Cr-Commit-Position: refs/heads/master@{#43461}
2017-02-27 22:12:17 +00:00
binji
d208cdd7f1 Add {lda,stl}x?r{,b,h} instructions to ARM64 assembler/disassembler
They are not currently implemented by the ARM64 simulator.

R=jarin@chromium.org, bmeurer@chromium.org

Review-Url: https://codereview.chromium.org/1990073002
Cr-Commit-Position: refs/heads/master@{#36385}
2016-05-19 20:10:05 +00:00
mstarzinger
cdafea2011 [presubmit] Enable readability/nolint linter checking.
R=jochen@chromium.org

Review URL: https://codereview.chromium.org/1506233008

Cr-Commit-Position: refs/heads/master@{#32745}
2015-12-10 10:41:47 +00:00
jacob.bramley
29f73ad104 [arm64] Fix some signed/unsigned type inconsistencies.
This fixes several warnings when cross-building using GCC (since r31087,
5cf1c0b).

In particular, CPURegister::code() now returns 'int', matching the other
platforms (and the coding style guide). The rest of the patch consists
of similar changes to make this work.

BUG=

Review URL: https://codereview.chromium.org/1393043003

Cr-Commit-Position: refs/heads/master@{#31176}
2015-10-08 11:32:48 +00:00
danno
5cf1c0bcf6 Re-reland: Remove register index/code indirection
Previous to this patch, both the lithium and TurboFan register
allocators tracked allocated registers by "indices", rather than
the register codes used elsewhere in the runtime. This patch
ensures that codes are used everywhere, and in the process cleans
up a bunch of redundant code and adds more structure to how the
set of allocatable registers is defined.

Some highlights of changes:

* TurboFan's RegisterConfiguration class moved to V8's top level
  so that it can be shared with Crankshaft.
* Various "ToAllocationIndex" and related methods removed.
* Code that can be easily shared between Register classes on
  different platforms is now shared.
* The list of allocatable registers on each platform is declared
  as a list rather than implicitly via the register index <->
  code mapping.

Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
Cr-Commit-Position: refs/heads/master@{#30913}

Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
Cr-Commit-Position: refs/heads/master@{#31075}

Review URL: https://codereview.chromium.org/1287383003

Cr-Commit-Position: refs/heads/master@{#31087}
2015-10-02 16:55:22 +00:00
danno
00e07b0057 Revert of Reland: Remove register index/code indirection (patchset #20 id:380001 of https://codereview.chromium.org/1287383003/ )
Reason for revert:
Failures on MIPS

Original issue's description:
> Remove register index/code indirection
>
> Previous to this patch, both the lithium and TurboFan register
> allocators tracked allocated registers by "indices", rather than
> the register codes used elsewhere in the runtime. This patch
> ensures that codes are used everywhere, and in the process cleans
> up a bunch of redundant code and adds more structure to how the
> set of allocatable registers is defined.
>
> Some highlights of changes:
>
> * TurboFan's RegisterConfiguration class moved to V8's top level
>   so that it can be shared with Crankshaft.
> * Various "ToAllocationIndex" and related methods removed.
> * Code that can be easily shared between Register classes on
>   different platforms is now shared.
> * The list of allocatable registers on each platform is declared
>   as a list rather than implicitly via the register index <->
>   code mapping.
>
> Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
> Cr-Commit-Position: refs/heads/master@{#30913}
>
> Committed: https://crrev.com/7b7a8205d9a00c678fb7a6e032a55fecbc1509cf
> Cr-Commit-Position: refs/heads/master@{#31075}

TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true

Review URL: https://codereview.chromium.org/1380863004

Cr-Commit-Position: refs/heads/master@{#31083}
2015-10-02 15:37:06 +00:00
danno
7b7a8205d9 Remove register index/code indirection
Previous to this patch, both the lithium and TurboFan register
allocators tracked allocated registers by "indices", rather than
the register codes used elsewhere in the runtime. This patch
ensures that codes are used everywhere, and in the process cleans
up a bunch of redundant code and adds more structure to how the
set of allocatable registers is defined.

Some highlights of changes:

* TurboFan's RegisterConfiguration class moved to V8's top level
  so that it can be shared with Crankshaft.
* Various "ToAllocationIndex" and related methods removed.
* Code that can be easily shared between Register classes on
  different platforms is now shared.
* The list of allocatable registers on each platform is declared
  as a list rather than implicitly via the register index <->
  code mapping.

Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
Cr-Commit-Position: refs/heads/master@{#30913}

Review URL: https://codereview.chromium.org/1287383003

Cr-Commit-Position: refs/heads/master@{#31075}
2015-10-02 13:59:06 +00:00
mstarzinger
6a769ac1df [presubmit] Enable readability/namespace linter checking.
This enables linter checking for "readability/namespace" violations
during presubmit and instead marks the few known exceptions that we
allow explicitly.

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/1371083003

Cr-Commit-Position: refs/heads/master@{#31019}
2015-09-30 13:47:11 +00:00
danno
3ac27431a9 Revert of Remove register index/code indirection (patchset #17 id:320001 of https://codereview.chromium.org/1287383003/ )
Reason for revert:
Failures on greedy RegAlloc, Fuzzer

Original issue's description:
> Remove register index/code indirection
>
> Previous to this patch, both the lithium and TurboFan register
> allocators tracked allocated registers by "indices", rather than
> the register codes used elsewhere in the runtime. This patch
> ensures that codes are used everywhere, and in the process cleans
> up a bunch of redundant code and adds more structure to how the
> set of allocatable registers is defined.
>
> Some highlights of changes:
>
> * TurboFan's RegisterConfiguration class moved to V8's top level
>   so that it can be shared with Crankshaft.
> * Various "ToAllocationIndex" and related methods removed.
> * Code that can be easily shared between Register classes on
>   different platforms is now shared.
> * The list of allocatable registers on each platform is declared
>   as a list rather than implicitly via the register index <->
>   code mapping.
>
> Committed: https://crrev.com/80bc6f6e11f79524e3f1ad05579583adfd5f18b2
> Cr-Commit-Position: refs/heads/master@{#30913}

TBR=akos.palfi@imgtec.com,bmeurer@chromium.org,jarin@chromium.org,paul.lind@imgtec.com,titzer@chromium.org
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true

Review URL: https://codereview.chromium.org/1365073002

Cr-Commit-Position: refs/heads/master@{#30914}
2015-09-24 13:39:03 +00:00
danno
80bc6f6e11 Remove register index/code indirection
Previous to this patch, both the lithium and TurboFan register
allocators tracked allocated registers by "indices", rather than
the register codes used elsewhere in the runtime. This patch
ensures that codes are used everywhere, and in the process cleans
up a bunch of redundant code and adds more structure to how the
set of allocatable registers is defined.

Some highlights of changes:

* TurboFan's RegisterConfiguration class moved to V8's top level
  so that it can be shared with Crankshaft.
* Various "ToAllocationIndex" and related methods removed.
* Code that can be easily shared between Register classes on
  different platforms is now shared.
* The list of allocatable registers on each platform is declared
  as a list rather than implicitly via the register index <->
  code mapping.

Review URL: https://codereview.chromium.org/1287383003

Cr-Commit-Position: refs/heads/master@{#30913}
2015-09-24 12:53:13 +00:00
jfb
a904b569a2 Security: disable nontemporals.
The operations were available on ARM64 and x86-32 but were unused.

It has been conjectured that nontemporals can be used for rowhammer-like bitflips more easily than regular load/store operations. It is therefore desirable to avoid generating these instructions in the future.

R= titzer, jochen, jln, Mark Seaborn, ruiq

Review URL: https://codereview.chromium.org/1276113002

Cr-Commit-Position: refs/heads/master@{#30139}
2015-08-12 16:58:06 +00:00
mstarzinger
58109a2c50 Remove several grab-bag includes from the v8.h header.
This is the first step of turning the v8.h file into a normal header
instead of an include-the-world header. The new rule is that no other
header files are allowed to include v8.h, which is enforced by DEPS.

Also the number of includes inside the v8.h file has been drastically
reduced. Basically the last missing piece is the inclusion of the big
objects-inl.h file.

This in turn makes many headers follow the IWYU principle.

R=bmeurer@chromium.org,hpayer@chromium.org,titzer@chromium.org

Review URL: https://codereview.chromium.org/1282503003

Cr-Commit-Position: refs/heads/master@{#30102}
2015-08-11 07:34:17 +00:00
jacob.bramley
8af3c3a103 ARM64: Fix some signed-unsigned comparisons from cdc43bc (r28412).
These trigger warnings on cross-builds under GCC.

BUG=

Review URL: https://codereview.chromium.org/1151463002

Cr-Commit-Position: refs/heads/master@{#28509}
2015-05-20 12:37:13 +00:00
bmeurer@chromium.org
d07a2eb806 Rename ASSERT* to DCHECK*.
This way we don't clash with the ASSERT* macros
defined by GoogleTest, and we are one step closer
to being able to replace our homegrown base/ with
base/ from Chrome.

R=jochen@chromium.org, svenpanne@chromium.org

Review URL: https://codereview.chromium.org/430503007

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-08-04 11:34:54 +00:00
rmcilroy@chromium.org
da52e6a631 Avoid redundent redefinition of __STDC_FORMAT_MACROS when building with clang
R=jochen@chromium.org, paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/404333003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22554 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-07-23 11:24:12 +00:00
rodolph.perfetta@arm.com
7ff3e3c86b ARM64: Clean up support for explicit literal load.
This is the first patch to improve literal pool handling in arm64. Cleans up
assembler/macro-assembler access to literal pools.

BUG=
R=rmcilroy@chromium.org

Review URL: https://codereview.chromium.org/318773009

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21723 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-06-09 14:23:46 +00:00
titzer@chromium.org
812edcdedc Documentation: fix comments for CommuteCondition.
R=jkummerow@google.com, jkummerow@chromium.org
BUG=

Review URL: https://codereview.chromium.org/313283003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21685 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-06-05 08:33:42 +00:00
titzer@chromium.org
3c501d3a4b Rename ReverseCondition to CommuteCondition, a more standard term.
R=dcarney@chromium.org, dcarney
BUG=

Review URL: https://codereview.chromium.org/313083006

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21677 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-06-04 14:57:51 +00:00
titzer@chromium.org
bd857a7d10 Rename InvertCondition and ReverseConditionForCmp on arm64 to be consistent with the other ports.
R=dcarney@chromium.org, dcarney
BUG=

Review URL: https://codereview.chromium.org/317663002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21676 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-06-04 13:40:52 +00:00
ishell@chromium.org
ff2d004f85 Presubmit checks recover:
1) runtime/references checks temporarily disabled (56 items left)
2) other errors fixed

R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/277913002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21222 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-05-09 12:59:24 +00:00
m.m.capewell@googlemail.com
cf8d874a4e ARM64: Use the shifter operand to merge in previous shift instructions.
When possible, we transform sequences of code of the form
    lsl x8, x9, #imm
    add x0, x1, x8
into
    add x0, x1, x9 LSL #imm

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/257203002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21161 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-05-06 11:00:28 +00:00
alexandre.rames@arm.com
67ea9e4b42 ARM64: Generate optimized code for Math.floor and Math.round with double outputs.
R=jkummerow@chromium.org, ulan@chromium.org

Review URL: https://codereview.chromium.org/258793002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21091 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-04-30 13:38:00 +00:00
bmeurer@chromium.org
d4b533d41b Bulk update of Google copyright headers in source files.
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/259183002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@21035 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-04-29 06:42:26 +00:00
Jacob.Bramley@arm.com
1bdc421adf ARM64: Slightly improve MacroAssembler::Allocate.
BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/247533005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20946 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-04-24 14:55:28 +00:00
bmeurer@chromium.org
d699684beb Revert "Some code cleanup, esp. includes and copyright headers."
This reverts commit r20938 for breaking the windows build.

TBR=ulan@chromium.org

Review URL: https://codereview.chromium.org/254463003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20939 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-04-24 11:44:22 +00:00
bmeurer@chromium.org
18b07afb8f Some code cleanup, esp. includes and copyright headers.
R=svenpanne@chromium.org

Review URL: https://codereview.chromium.org/257453003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20938 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-04-24 11:32:48 +00:00
jochen@chromium.org
2ce0bebba1 Rename A64 port to ARM64 port
BUG=354405
R=ulan@chromium.org, rodolph.perfetta@arm.com
LOG=y

Review URL: https://codereview.chromium.org/207823003

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20148 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-03-21 09:28:26 +00:00