Commit Graph

32 Commits

Author SHA1 Message Date
Ilija Pavlovic
99459edf5f MIPS64: Remove optimizations with MADD and MSUB.
On Loongson 3A, MADD/MSUB instructions are actually fused MADD/MSUB and
they can cause failure in some of the tests. Since this optimization is
rarely used, and not used at all on MIPS64R6, MADD/MSUB instructions
are removed from the source base.

TEST=
BUG=

Change-Id: Ifbb5508a62731bb061f332864ffd1e210e97f963
Reviewed-on: https://chromium-review.googlesource.com/558066
Reviewed-by: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com>
Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@imgtec.com>
Cr-Commit-Position: refs/heads/master@{#46387}
2017-07-03 13:19:28 +00:00
dusan.simicic
3e3dbdf3e5 MIPS[64]: Support for some SIMD operations (8)
Add support for S1x4And, S1x4Or, S1x4Xor, S1x4Not, S1x4AnyTrue,
S1x4AllTrue, S1x8And, S1x8Or, S1x8Xor, S1x8Not, S1x8AnyTrue,
S1x8AllTrue, S1x16And, S1x16Or, S1x16Xor, S1x16Not, S1x16AnyTrue,
S1x16AllTrue, SimdLoad, SimdStore operations for mips32 and mips64
architectures.

BUG=

Review-Url: https://codereview.chromium.org/2801683003
Cr-Commit-Position: refs/heads/master@{#45662}
2017-06-01 13:25:50 +00:00
Miran.Karic
838d0b4bd2 MIPS64: Add/fix bit insertion/extraction instrs.
Added support for DINSM and DINSU bit insertion instructions. Also fixed
errors with bit extraction instructions, added disassembler tests and
adjusted the code to make it more compact.

BUG=
TEST=cctest/test-assembler-mips/Dins
     cctest/test-disasm-mips/Type0

Review-Url: https://codereview.chromium.org/2871663002
Cr-Commit-Position: refs/heads/master@{#45226}
2017-05-10 10:06:53 +00:00
dusan.simicic
cd5c009569 MIPS[64]: Support for MSA instructions
This patch adds support for MIPS SIMD (MSA) instructions in Assembler
and Decoder (disassembler) classes. MSA instructions are implemented for
both mips32 and mips64 architectures.

BUG=

Review-Url: https://codereview.chromium.org/2740123004
Cr-Commit-Position: refs/heads/master@{#44148}
2017-03-27 13:20:35 +00:00
Ilija.Pavlovic
65fd5e1165 MIPS: Implement MADD.S, MSUB, MADDF and MSUBF.
Implementation MADD.S. MSUB.fmt, MADDF.fmt, MSUBF.fmt and corresponding
tests for assembler and disassembler.

TEST=cctest/test-assembler-mips[64], cctest/test-disasm-mips[64]
BUG=

Review-Url: https://codereview.chromium.org/2313623002
Cr-Commit-Position: refs/heads/master@{#39415}
2016-09-14 11:37:13 +00:00
ivica.bogosavljevic
28bd118148 MIPS64: Add support for DINS to disassembler
BUG=

Review-Url: https://codereview.chromium.org/2331843004
Cr-Commit-Position: refs/heads/master@{#39375}
2016-09-13 09:21:02 +00:00
ivica.bogosavljevic
e1e50f3fff Implement byte swapping instructions on MIPS32 and MIPS64.
BUG=

Review-Url: https://codereview.chromium.org/2069933003
Cr-Commit-Position: refs/heads/master@{#37295}
2016-06-27 14:36:40 +00:00
machenbach
a23222ed32 [build] Fix a clang warning
For cross-compiler-compatibility and standards compliance %p
requires a void*, rather than any pointer type.

BUG=chromium:474921

Review-Url: https://codereview.chromium.org/2001073002
Cr-Commit-Position: refs/heads/master@{#36466}
2016-05-24 10:47:24 +00:00
marija.antic
fdf19ffa5d MIPS64: Fix rotate instructions in simulator
Fix for drotr and drotr32 instructions in MIPS64 simulator.

BUG=

Review URL: https://codereview.chromium.org/1880953002

Cr-Commit-Position: refs/heads/master@{#35420}
2016-04-12 14:49:50 +00:00
ivica.bogosavljevic
2c63060f11 MIPS64: r6 compact branch optimization.
Several ports to enable r6 compact branch optimizations on MIPS64

Port 3573d3cb58

Original commit message:
MIPS: r6 compact branch optimization.

Port bddf8c9e08

Original commit message:
MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort()

Port 6993cd0de5

Original commit message:
MIPS: Fix 'MIPS:r6 compact branch optimization.'

Jic and jialc compact branch ops are fixed as they does
not have 'forbidden slot' restriction. Also COP1 branches
(CTI instructions) added to IsForbiddenAfterBranchInstr().

Port bb332195d3

Original commit message:
MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort()

Port c91bcf7192

Original commit message:
MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort()
for r6.

BUG=

Review URL: https://codereview.chromium.org/1534183002

Cr-Commit-Position: refs/heads/master@{#33136}
2016-01-06 13:36:41 +00:00
jochen
6f472db65a Disable soon to be deprecated APIs per default for v8
Embedders still can use those APIs by default

test-api.cc still has an exception to use the old APIs...

BUG=v8:4143
R=vogelheim@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/1505803004

Cr-Commit-Position: refs/heads/master@{#32701}
2015-12-09 10:35:04 +00:00
alan.li
cfd9beeced MIPS: Adding simulator support for AUI/DAUI/DAHI/DATI.
BUG=

Review URL: https://codereview.chromium.org/1481493002

Cr-Commit-Position: refs/heads/master@{#32417}
2015-11-30 20:30:23 +00:00
Djordje.Pesic
b287c74308 MIPS: Fixup disasembler for ctc1 and cfc1
These instructions now show FCSR in disassembly, instead f31

BUG=

Review URL: https://codereview.chromium.org/1481023002

Cr-Commit-Position: refs/heads/master@{#32366}
2015-11-27 11:38:18 +00:00
jochen
3cf6e040c4 Mark cctests that don't use deprecated APIs as such
BUG=4134
R=epertoso@chromium.org
LOG=n

Review URL: https://codereview.chromium.org/1451733002

Cr-Commit-Position: refs/heads/master@{#32011}
2015-11-16 16:45:31 +00:00
yangguo
1667c15e37 Debugger: move implementation to a separate folder.
R=cbruni@chromium.org

Review URL: https://codereview.chromium.org/1265923002

Cr-Commit-Position: refs/heads/master@{#29951}
2015-07-31 11:08:15 +00:00
Ilija.Pavlovic
2bc5a21211 MIPS:
Improved checking target ranges for J and JAL instructions.
Adapted disassembler test for J and JAL instructions.

TEST=cctest/test-disasm-mips[64]
BUG=

Review URL: https://codereview.chromium.org/1237083003

Cr-Commit-Position: refs/heads/master@{#29693}
2015-07-16 08:14:08 +00:00
machenbach
c63e50edc9 Reland Update V8 DEPS.
Rolling v8/tools/clang to 58128abd44c22255def1163d30bc9bb2cc85e15c

Reland after https://codereview.chromium.org/1241643002/

TBR=jochen@chromium.org, thakis@chromium.org

Review URL: https://codereview.chromium.org/1237793003

Cr-Commit-Position: refs/heads/master@{#29673}
2015-07-15 10:32:03 +00:00
machenbach
c59fdf929c Revert of Update V8 DEPS. (patchset id:40001 of https://codereview.chromium.org/1232583002/)
Reason for revert:
[Sheriff] Looks like another clang option got deprecated: http://build.chromium.org/p/client.v8/builders/V8%20Linux%20ASAN%20mipsel%20-%20debug%20builder/builds/326

Original issue's description:
> Update V8 DEPS.
>
> Rolling v8/tools/clang to 58128abd44c22255def1163d30bc9bb2cc85e15c
>
> Original CL: https://codereview.chromium.org/1232043002/
>
> BUG=
>
> Committed: https://crrev.com/6211e1660492f653d30ddd1336bce6f9083ede94
> Cr-Commit-Position: refs/heads/master@{#29598}

TBR=jochen@chromium.org,akos.palfi@imgtec.com
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=

Review URL: https://codereview.chromium.org/1232803003

Cr-Commit-Position: refs/heads/master@{#29600}
2015-07-13 11:45:28 +00:00
machenbach
6211e16604 Update V8 DEPS.
Rolling v8/tools/clang to 58128abd44c22255def1163d30bc9bb2cc85e15c

Original CL: https://codereview.chromium.org/1232043002/

BUG=

Review URL: https://codereview.chromium.org/1232583002

Cr-Commit-Position: refs/heads/master@{#29598}
2015-07-13 10:59:07 +00:00
Ilija.Pavlovic
75e6717591 MIPS: Disassembler enhancement. Disassembled branch instruction displays branch target absolute address.
TEST=cctest/test-disasm-mips[64]
BUG=

Review URL: https://codereview.chromium.org/1213553004

Cr-Commit-Position: refs/heads/master@{#29462}
2015-07-03 10:32:03 +00:00
Ilija.Pavlovic
f0c4edfdc5 MIPS: Implemented PC-relative instructions for R6.
Added: JIC, BEQZC, JIALC, LDPC, LWPC, ALUIPC, ADDIUPC, ALIGN/DAILGN, LWUPC,
AUIPC, BC, BALC. Additional fixed compact branch offset.

TEST=test-assembler-mips[64]/r6_align, r6_dalign, r6_aluipc, r6_lwpc, r6_jic,
                             r6_beqzc, r6_jialc, r6_addiupc, r6_ldpc, r6_lwupc,
                             r6_auipc, r6_bc, r6_balc
BUG=

Review URL: https://codereview.chromium.org/1195793002

Cr-Commit-Position: refs/heads/master@{#29143}
2015-06-19 11:06:14 +00:00
Djordje.Pesic
874c54e05e MIPS: Add float instructions and test coverage, part two
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests.

Review URL: https://codereview.chromium.org/1145223002

Cr-Commit-Position: refs/heads/master@{#28595}
2015-05-22 13:49:00 +00:00
Djordje.Pesic
0f93a456ec Reland "MIPS: Add float instructions and test coverage, part one"
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests.

Review URL: https://codereview.chromium.org/1147493002

Cr-Commit-Position: refs/heads/master@{#28472}
2015-05-19 10:35:07 +00:00
paul.lind
d090469cdd Revert of MIPS: Add float instructions and test coverage, part one
Reason for revert:
Simulator test failures in RunChangeFloat64ToInt.., RunChangeTaggedToInt32,
div-mul-minus-one

Original issue's description:

> Implement assembler, disassembler tests for all instructions for mips32
> and mips64. Additionally, add missing single precision float instructions
> for r2 and r6 architecture variants in assembler, simulator and disassembler
> with corresponding tests.

BUG=

Review URL: https://codereview.chromium.org/1143473003

Cr-Commit-Position: refs/heads/master@{#28404}
2015-05-14 18:44:41 +00:00
Djordje.Pesic
2a6a87d71a MIPS: Add float instructions and test coverage, part one
Implement assembler, disassembler tests for all instructions for mips32 and mips64. Additionally, add missing single precision float instructions for r2 and r6 architecture variants in assembler, simulator and disassembler with corresponding tests.

Review URL: https://codereview.chromium.org/1119203003

Cr-Commit-Position: refs/heads/master@{#28402}
2015-05-14 14:02:36 +00:00
dusan.milosavljevic
76ddd58cff MIPS: Add min/max suffixed variants.
TEST=
BUG=

Review URL: https://codereview.chromium.org/1118693002

Cr-Commit-Position: refs/heads/master@{#28181}
2015-04-30 16:43:09 +00:00
Djordje.Pesic
9da34c56a1 MIPS: Add rounding support in simulator and RINT instruction.
Added rounding according to fcsr, CVT_W_D and RINT.D instruction in assembler, dissasembler and simulator and wrote appropiate tests.

BUG=

Review URL: https://codereview.chromium.org/1108583003

Cr-Commit-Position: refs/heads/master@{#28143}
2015-04-30 06:29:16 +00:00
dusan.milosavljevic
4b5af7b32e MIPS: Major fixes and clean-up in asm. for instruction encoding.
- Fixed single float register type instruction en[de]coding in assembler and disassembler.
- Added max and min instructions for r6 and corresponding tests.
- Fixed selection instruction for boundary cases in simulator.
- Update assembler tests to be more thorough wrt boundary cases.

TEST=cctest/test-assembler-mips64/MIPS17, MIPS18
     cctest/test-disasm-mips64/Type1
     cctest/test-assembler-mips/MIPS16, MIPS17
     cctest/test-disasm-mips/Type1
BUG=

Review URL: https://codereview.chromium.org/1057323002

Cr-Commit-Position: refs/heads/master@{#27601}
2015-04-06 11:54:38 +00:00
dusan.milosavljevic
f00b4e94fb MIPS: Refactor simulator and add selection instructions for r6.
TEST=
BUG=

Review URL: https://codereview.chromium.org/1046873004

Cr-Commit-Position: refs/heads/master@{#27530}
2015-03-30 17:37:13 +00:00
yangguo
019096f829 Serializer: move to a subfolder and clean up includes.
R=jochen@chromium.org

Review URL: https://codereview.chromium.org/1041743002

Cr-Commit-Position: refs/heads/master@{#27501}
2015-03-27 15:29:07 +00:00
dusan.milosavljevic@imgtec.com
e0401f3f71 MIPS64: Add support for architecture revision 6.
TEST=
BUG=
R=jkummerow@chromium.org, paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/426863006

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22681 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-07-29 18:02:26 +00:00
dusan.milosavljevic@rt-rk.com
a0f6878a06 Add mips64 port.
Summary:

- Changes in common code are mainly boilerplate changes,
gyp and test status files updates.

- On mips64 simulator all tests pass from all test units.

- Current issues: mjsunit JS debugger tests fail randomly on HW in release mode.
Corresponding tests are skipped on HW.

- Skipped tests on mips64: test-heap/ReleaseOverReservedPages, mjsunit/debug-*

TEST=
BUG=
R=danno@chromium.org, plind44@gmail.com, ulan@chromium.org

Review URL: https://codereview.chromium.org/371923006

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22297 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2014-07-09 11:08:26 +00:00