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34 Commits

Author SHA1 Message Date
ulan@chromium.org
4403daca1a ARM: generate integer zero in a uniform manner. 
ARM generated integer zero as either Operand(0, RelocInfo::NONE32), or
Operand(0), or Operand::Zero(). My change makes it use only
Operand::Zero().

This has no functional impact, it's pure cleanup.

R= ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11745030
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13318 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-01-07 09:43:12 +00:00
ulan@chromium.org
0606abbaab Rename RelocInfo::NONE to RelocInfo::NONE32. 
This CL only does renaming, nothing else.

Followup to:
https://chromiumcodereview.appspot.com/11695006/

There are now NONE and NONE64 RelocInfo types, but only ARM uses them
both at the same time. They were added in:
https://chromiumcodereview.appspot.com/11191029/

R= ulan@chromium.org

Review URL: https://chromiumcodereview.appspot.com/11744020
Patch from JF Bastien <jfb@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13311 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2013-01-04 10:56:24 +00:00
ulan@chromium.org
74492ab2d4 Emit VMLA for multiply-add on ARM 
Review URL: https://chromiumcodereview.appspot.com/11293061
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12958 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-11-14 11:01:18 +00:00
yangguo@chromium.org
59f212e7eb Relax requirement from VFP3 to VFP2 where possible. 
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10818026

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12194 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2012-07-25 15:26:16 +00:00
svenpanne@chromium.org
4084e698c3 Fixed a bug in the chaining of fixup position 
The ARM and MIPS assemblers had a bug where they did not handle the last element
in the list of code positions correctly during the fixup of offsets for forward
jumps. This happened when the first instruction contained a forward jump to a
label, and that label was used in a forward jump later, too.

Unified the code for Assembler::next on ARM and MIPS while we were there.

Added test cases, even for ia32/x64, which seem to be correct, even I don't
fully understand why... %-}

BUG=v8:1644
Review URL: http://codereview.chromium.org/7786001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9063 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-08-30 07:36:31 +00:00
karlklose@chromium.org
26fda9bf32 ARM: Optimisations for call, jump and untag. 
Improves some V8 benchmarks by a few % on A9.

Patch by ARM Ltd.

BUG=none
TEST=Added to test-assembler-arm.cc.

Review URL: http://codereview.chromium.org/6874010

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7647 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-18 13:53:11 +00:00
sgjesse@chromium.org
6255476028 ARM: Add support load/store multiple VFP registers 
Enter/exit frames with save doubles use these instructions instead of generating 16 load/store instructions.

R=karlklose@chromium.org, rodolph.perfetta@gmail.com

BUG=
TEST=

Review URL: http://codereview.chromium.org//6691057

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7509 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-04-06 09:06:23 +00:00
vitalyr@chromium.org
179aef2b8f VM initialization refactoring. 
This patch introduces global once per-process initialization and moves
the OS and CPU setup there. This makes CPU features isolate-independent.

Review URL: http://codereview.chromium.org/6670119

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7462 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-31 16:17:37 +00:00
vitalyr@chromium.org
7976ca2cbc Merge isolates to bleeding_edge. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7271 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-18 20:35:07 +00:00
vitalyr@chromium.org
76e226f832 Revert r7268: it borked the history. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7269 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-18 19:41:05 +00:00
vitalyr@chromium.org
6ff7fdebd3 Merge isolates to bleeding_edge. 
Review URL: http://codereview.chromium.org/6685088

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-18 18:49:56 +00:00
karlklose@chromium.org
984135cb32 ARM: Improved double to integer truncation. 
Patch from ARM Ltd.

BUG=none
TEST=Added to cctest/test-assembler-arm.cc and cctest/test-disasm-arm.cc

Review URL: http://codereview.chromium.org/6625084

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@7174 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-03-15 11:19:13 +00:00
sgjesse@chromium.org
84de496896 Implements DoubleToI on ARM. Refactor some VFP code at the same time and 
fix the simulator behaviour.

BUG=none
TEST=added to cctest/test-assembler-arm.cc

Patch by Rodolph Perfetta from ARM Ltd.

Review URL: http://codereview.chromium.org/6368053


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6629 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-02-04 07:08:50 +00:00
ager@chromium.org
8198db7934 ARM: Add support for DoMathAbs with double inputs. 
Adds vabs instruction to simulator, assembler, disassembler and tests.

BUG=none
TEST=Added to cctest.

Review URL: http://codereview.chromium.org/6366016

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6531 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-31 10:16:28 +00:00
sgjesse@chromium.org
26a8dc3818 ARM: Make the ARM hardware builder green 
Fix a bug in the --debug-code alignment check in the C entry stub.

Don't force the --debug-code flag in the ARM disassembler tests. The framework does support passing flags and the test runner will when running tests in debug mode.

Skip some deserialization tests which crashes from time to time.
Review URL: http://codereview.chromium.org/6393007

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@6484 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2011-01-26 09:52:25 +00:00
erik.corry@gmail.com
8ebe8e4756 ARM: The Simulator will now handle different VFP rounding modes. RZ and RM are implemented. This is a commit of 
http://codereview.chromium.org/4295003/show for Alexander Rames of ARM.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5790 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-11-09 08:26:02 +00:00
erik.corry@gmail.com
0dcaac1939 Make Failure inherit from MaybeObject instead of Object. 
Review URL: http://codereview.chromium.org/3970005

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5698 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-10-25 15:22:03 +00:00
whesse@chromium.org
7368ce808e Fix the ambigous Operand(0) for newer C++ compilers. 
Review URL: http://codereview.chromium.org/3351010/show
Committed for Thiago Farina <tfarina@chromium.org>


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5419 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-09-07 11:09:45 +00:00
erik.corry@gmail.com
66d13be5f9 Fix incorrect encoding of single and double precision registers for some VFP instructions. Also fix incorrect disassembling of vldr/vstr. This is a commit of http://codereview.chromium.org/3107027 for Rodolph Perfetta. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5352 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-08-26 08:53:00 +00:00
erik.corry@gmail.com
6b20299bef Add support for vstr for single precision VFP register. This is a commit of http://codereview.chromium.org/3064045 for Rodolph Perfetta 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5281 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-08-17 08:43:45 +00:00
ager@chromium.org
74f9789f61 Landing for Rodolph Perfetta. 
Add support for saturation instruction (ARMv6 or above).
The byte array clamping code has been updated accordingly.

Review URL: http://codereview.chromium.org/3036008/show

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5106 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-07-21 07:42:51 +00:00
kaznacheev@chromium.org
0243bc875c Move serialized scope info from Code object to SharedFunctionInfo. 
The scope info is now stored in a FixedArray referenced from SharedFunctionInfo.


Review URL: http://codereview.chromium.org/2918001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5056 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-07-13 13:06:33 +00:00
erik.corry@gmail.com
67c0ec6f17 Update and improve support for ARMv7 bitfield instructions. 
This is a commit of http://codereview.chromium.org/2124022
for Rodolph Perfetta.  I changed the test in
test-assembler-arm.cc so it only runs if ARMv7 is supported.


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4744 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-05-27 13:46:18 +00:00
kasperl@chromium.org
7d6a3b433f Merge the partial_snapshots branch back into bleeding_edge. For 
now, the custom call generator stuff is disabled.
Review URL: http://codereview.chromium.org/1094014

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4217 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-03-23 11:40:38 +00:00
whesse@chromium.org
5428e036d1 Make ARM assembler VFP3 test pass on machines without VFP3 floating point hardware. 
Review URL: http://codereview.chromium.org/543187

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3691 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-25 15:17:58 +00:00
whesse@chromium.org
f88e7e82b7 Add vstr and vldr floating point load and store to ARM assembler, disassembler, and simulator. 
Review URL: http://codereview.chromium.org/545155

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@3687 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2010-01-25 11:54:10 +00:00
erik.corry@gmail.com
adaab82197 Compile fixes for ARM and miscellaneous spolling. 
Review URL: http://codereview.chromium.org/199056

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2853 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-09-09 09:35:34 +00:00
lrn@chromium.org
9230ad29eb ARM native regexps. 
Review URL: http://codereview.chromium.org/173567


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@2785 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-08-31 12:40:37 +00:00
lrn@chromium.org
a4d756a1c8 Move backend specific files to separate directories. 
Move ia32 and arm specific files to subdirectories to make it easier to add more backends.

Review URL: http://codereview.chromium.org/92068


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1782 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-04-23 12:06:38 +00:00
iposva@chromium.org
c093e94546 - Pass the knowledge whether the old GC is compacting to the GC prologue and epilogue. This allows us to skip frame cooking and uncooking when doing a mark-sweep GC. 
- Add the ability for the code to refer to its code object by adding a handle to the code object in the MacroAssembler.

Review URL: http://codereview.chromium.org/27133

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1368 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2009-02-25 16:52:15 +00:00
deanm@chromium.org
7b0ab87baf Remove an ARM jump elimination test. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@396 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2008-09-30 10:20:58 +00:00
deanm@chromium.org
c178664049 Fix some arm related flags with the new flag system. 
git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@298 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2008-09-12 11:00:36 +00:00
christian.plesner.hansen@gmail.com
9bed566bdb Changed copyright header from google inc. to v8 project authors. 
Added presubmit step to check copyright.



git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@242 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2008-09-09 20:08:45 +00:00
christian.plesner.hansen
c42f5829a1 Included mjsunit JavaScript test suite and C++ unit tests. 
In the shell sample don't print the result of executing a script, only
evaluating expressions.

Fixed issue when building samples on Windows using a shared V8
library.  Added visibility option on Linux build which makes the
generated library 18% smaller.

Changed build system to accept multiple build modes in one build and
generate seperate objects, libraries and executables for each mode.

Removed deferred negation optimization (a * -b => -(a * b)) since this
visibly changes operand conversion order.

Improved parsing performance by introducing stack guard in preparsing.
Without a stack guard preparsing always bails out with stack overflow.


git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@16 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
 2008-08-22 13:33:59 +00:00