9fc4fc141f
BUG=chromium:524425 LOG=N Review URL: https://codereview.chromium.org/1332283002 Cr-Commit-Position: refs/heads/master@{#30695}
69 lines
1.9 KiB
C++
69 lines
1.9 KiB
C++
// Copyright 2006-2009 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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// CPU specific code for arm independent of OS goes here.
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#ifdef __arm__
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#ifdef __QNXNTO__
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#include <sys/mman.h> // for cache flushing.
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#undef MAP_TYPE
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#else
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#include <sys/syscall.h> // for cache flushing.
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#endif
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#endif
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#if V8_TARGET_ARCH_ARM
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#include "src/assembler.h"
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#include "src/macro-assembler.h"
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namespace v8 {
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namespace internal {
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void CpuFeatures::FlushICache(void* start, size_t size) {
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#if !defined(USE_SIMULATOR)
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#if V8_OS_QNX
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msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
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#else
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register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
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register uint32_t end asm("r1") = beg + size;
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register uint32_t flg asm("r2") = 0;
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#ifdef __clang__
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// This variant of the asm avoids a constant pool entry, which can be
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// problematic when LTO'ing. It is also slightly shorter.
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register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
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asm volatile("svc 0\n"
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:
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: "r"(beg), "r"(end), "r"(flg), "r"(scno)
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: "memory");
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#else
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// Use a different variant of the asm with GCC because some versions doesn't
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// support r7 as an asm input.
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asm volatile(
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// This assembly works for both ARM and Thumb targets.
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// Preserve r7; it is callee-saved, and GCC uses it as a frame pointer for
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// Thumb targets.
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" push {r7}\n"
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// r0 = beg
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// r1 = end
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// r2 = flags (0)
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" ldr r7, =%c[scno]\n" // r7 = syscall number
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" svc 0\n"
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" pop {r7}\n"
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:
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: "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush)
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: "memory");
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#endif
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#endif
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#endif // !USE_SIMULATOR
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}
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} // namespace internal
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} // namespace v8
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#endif // V8_TARGET_ARCH_ARM
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