62f929ff4c
New code should use nullptr instead of NULL. This patch updates existing use of NULL to nullptr where applicable, making the code base more consistent. BUG=v8:6928,v8:6921 Cq-Include-Trybots: master.tryserver.chromium.linux:linux_chromium_rel_ng;master.tryserver.v8:v8_linux_noi18n_rel_ng Change-Id: I4687f5b96fcfd88b41fa970a2b937b4f6538777c Reviewed-on: https://chromium-review.googlesource.com/718338 Commit-Queue: Mathias Bynens <mathias@chromium.org> Reviewed-by: Andreas Haas <ahaas@chromium.org> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Ulan Degenbaev <ulan@chromium.org> Reviewed-by: Toon Verwaest <verwaest@chromium.org> Reviewed-by: Jakob Gruber <jgruber@chromium.org> Reviewed-by: Yang Guo <yangguo@chromium.org> Cr-Commit-Position: refs/heads/master@{#48557}
865 lines
27 KiB
C++
865 lines
27 KiB
C++
// Copyright 2011 the V8 project authors. All rights reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include <stdlib.h>
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#include "src/v8.h"
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#include "src/code-factory.h"
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#include "src/debug/debug.h"
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#include "src/disasm.h"
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#include "src/disassembler.h"
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#include "src/frames-inl.h"
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#include "src/macro-assembler.h"
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#include "test/cctest/cctest.h"
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namespace v8 {
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namespace internal {
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#define __ assm.
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static void DummyStaticFunction(Object* result) {
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}
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TEST(DisasmIa320) {
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CcTest::InitializeVM();
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Isolate* isolate = CcTest::i_isolate();
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HandleScope scope(isolate);
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v8::internal::byte buffer[8192];
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Assembler assm(isolate, buffer, sizeof buffer);
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DummyStaticFunction(nullptr); // just bloody use it (DELETE; debugging)
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// Short immediate instructions
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__ adc(eax, 12345678);
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__ add(eax, Immediate(12345678));
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__ or_(eax, 12345678);
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__ sub(eax, Immediate(12345678));
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__ xor_(eax, 12345678);
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__ and_(eax, 12345678);
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Handle<FixedArray> foo = isolate->factory()->NewFixedArray(10, TENURED);
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__ cmp(eax, foo);
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// ---- This one caused crash
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__ mov(ebx, Operand(esp, ecx, times_2, 0)); // [esp+ecx*4]
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// ---- All instructions that I can think of
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__ add(edx, ebx);
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__ add(edx, Operand(12, RelocInfo::NONE32));
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__ add(edx, Operand(ebx, 0));
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__ add(edx, Operand(ebx, 16));
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__ add(edx, Operand(ebx, 1999));
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__ add(edx, Operand(ebx, -4));
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__ add(edx, Operand(ebx, -1999));
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__ add(edx, Operand(esp, 0));
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__ add(edx, Operand(esp, 16));
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__ add(edx, Operand(esp, 1999));
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__ add(edx, Operand(esp, -4));
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__ add(edx, Operand(esp, -1999));
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__ nop();
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__ add(esi, Operand(ecx, times_4, 0));
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__ add(esi, Operand(ecx, times_4, 24));
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__ add(esi, Operand(ecx, times_4, -4));
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__ add(esi, Operand(ecx, times_4, -1999));
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__ nop();
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__ add(edi, Operand(ebp, ecx, times_4, 0));
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__ add(edi, Operand(ebp, ecx, times_4, 12));
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__ add(edi, Operand(ebp, ecx, times_4, -8));
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__ add(edi, Operand(ebp, ecx, times_4, -3999));
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__ add(Operand(ebp, ecx, times_4, 12), Immediate(12));
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__ nop();
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__ add(ebx, Immediate(12));
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__ nop();
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__ adc(edx, Operand(ebx));
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__ adc(ecx, 12);
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__ adc(ecx, 1000);
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__ nop();
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__ and_(edx, 3);
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__ and_(edx, Operand(esp, 4));
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__ cmp(edx, 3);
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__ cmp(edx, Operand(esp, 4));
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__ cmp(Operand(ebp, ecx, times_4, 0), Immediate(1000));
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Handle<FixedArray> foo2 = isolate->factory()->NewFixedArray(10, TENURED);
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__ cmp(ebx, foo2);
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__ cmpb(ebx, Operand(ebp, ecx, times_2, 0));
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__ cmpb(Operand(ebp, ecx, times_2, 0), ebx);
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__ or_(edx, 3);
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__ xor_(edx, 3);
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__ nop();
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__ cpuid();
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__ movsx_b(edx, ecx);
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__ movsx_w(edx, ecx);
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__ movzx_b(edx, ecx);
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__ movzx_w(edx, ecx);
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__ nop();
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__ imul(edx, ecx);
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__ shld(edx, ecx, 10);
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__ shld_cl(edx, ecx);
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__ shrd(edx, ecx, 10);
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__ shrd_cl(edx, ecx);
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__ bts(edx, ecx);
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__ bts(Operand(ebx, ecx, times_4, 0), ecx);
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__ nop();
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__ pushad();
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__ popad();
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__ pushfd();
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__ popfd();
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__ push(Immediate(12));
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__ push(Immediate(23456));
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__ push(ecx);
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__ push(esi);
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__ push(Operand(ebp, JavaScriptFrameConstants::kFunctionOffset));
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__ push(Operand(ebx, ecx, times_4, 0));
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__ push(Operand(ebx, ecx, times_4, 0));
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__ push(Operand(ebx, ecx, times_4, 10000));
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__ pop(edx);
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__ pop(eax);
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__ pop(Operand(ebx, ecx, times_4, 0));
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__ nop();
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__ add(edx, Operand(esp, 16));
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__ add(edx, ecx);
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__ mov_b(edx, ecx);
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__ mov_b(ecx, 6);
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__ mov_b(Operand(ebx, ecx, times_4, 10000), 6);
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__ mov_b(Operand(esp, 16), edx);
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__ mov_w(edx, Operand(esp, 16));
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__ mov_w(Operand(esp, 16), edx);
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__ nop();
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__ movsx_w(edx, Operand(esp, 12));
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__ movsx_b(edx, Operand(esp, 12));
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__ movzx_w(edx, Operand(esp, 12));
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__ movzx_b(edx, Operand(esp, 12));
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__ nop();
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__ mov(edx, 1234567);
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__ mov(edx, Operand(esp, 12));
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__ mov(Operand(ebx, ecx, times_4, 10000), Immediate(12345));
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__ mov(Operand(ebx, ecx, times_4, 10000), edx);
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__ nop();
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__ dec_b(edx);
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__ dec_b(Operand(eax, 10));
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__ dec_b(Operand(ebx, ecx, times_4, 10000));
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__ dec(edx);
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__ cdq();
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__ nop();
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__ idiv(edx);
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__ idiv(Operand(edx, ecx, times_1, 1));
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__ idiv(Operand(esp, 12));
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__ div(edx);
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__ div(Operand(edx, ecx, times_1, 1));
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__ div(Operand(esp, 12));
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__ mul(edx);
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__ neg(edx);
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__ not_(edx);
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__ test(Operand(ebx, ecx, times_4, 10000), Immediate(123456));
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__ imul(edx, Operand(ebx, ecx, times_4, 10000));
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__ imul(edx, ecx, 12);
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__ imul(edx, Operand(edx, eax, times_2, 42), 8);
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__ imul(edx, ecx, 1000);
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__ imul(edx, Operand(ebx, ecx, times_4, 1), 9000);
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__ inc(edx);
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__ inc(Operand(ebx, ecx, times_4, 10000));
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__ push(Operand(ebx, ecx, times_4, 10000));
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__ pop(Operand(ebx, ecx, times_4, 10000));
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__ call(Operand(ebx, ecx, times_4, 10000));
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__ jmp(Operand(ebx, ecx, times_4, 10000));
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__ lea(edx, Operand(ebx, ecx, times_4, 10000));
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__ or_(edx, 12345);
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__ or_(edx, Operand(ebx, ecx, times_4, 10000));
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__ nop();
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__ rcl(edx, 1);
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__ rcl(edx, 7);
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__ rcr(edx, 1);
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__ rcr(edx, 7);
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__ ror(edx, 1);
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__ ror(edx, 6);
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__ ror_cl(edx);
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__ ror(Operand(ebx, ecx, times_4, 10000), 1);
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__ ror(Operand(ebx, ecx, times_4, 10000), 6);
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__ ror_cl(Operand(ebx, ecx, times_4, 10000));
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__ sar(edx, 1);
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__ sar(edx, 6);
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__ sar_cl(edx);
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__ sar(Operand(ebx, ecx, times_4, 10000), 1);
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__ sar(Operand(ebx, ecx, times_4, 10000), 6);
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__ sar_cl(Operand(ebx, ecx, times_4, 10000));
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__ sbb(edx, Operand(ebx, ecx, times_4, 10000));
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__ shl(edx, 1);
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__ shl(edx, 6);
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__ shl_cl(edx);
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__ shl(Operand(ebx, ecx, times_4, 10000), 1);
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__ shl(Operand(ebx, ecx, times_4, 10000), 6);
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__ shl_cl(Operand(ebx, ecx, times_4, 10000));
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__ shrd_cl(Operand(ebx, ecx, times_4, 10000), edx);
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__ shr(edx, 1);
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__ shr(edx, 7);
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__ shr_cl(edx);
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__ shr(Operand(ebx, ecx, times_4, 10000), 1);
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__ shr(Operand(ebx, ecx, times_4, 10000), 6);
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__ shr_cl(Operand(ebx, ecx, times_4, 10000));
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// Immediates
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__ adc(edx, 12345);
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__ add(ebx, Immediate(12));
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__ add(Operand(edx, ecx, times_4, 10000), Immediate(12));
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__ and_(ebx, 12345);
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__ cmp(ebx, 12345);
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__ cmp(ebx, Immediate(12));
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__ cmp(Operand(edx, ecx, times_4, 10000), Immediate(12));
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__ cmpb(eax, Immediate(100));
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__ or_(ebx, 12345);
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__ sub(ebx, Immediate(12));
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__ sub(Operand(edx, ecx, times_4, 10000), Immediate(12));
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__ xor_(ebx, 12345);
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__ imul(edx, ecx, 12);
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__ imul(edx, ecx, 1000);
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__ cld();
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__ rep_movs();
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__ rep_stos();
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__ stos();
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__ sub(edx, Operand(ebx, ecx, times_4, 10000));
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__ sub(edx, ebx);
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__ test(edx, Immediate(12345));
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__ test(edx, Operand(ebx, ecx, times_8, 10000));
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__ test(Operand(esi, edi, times_1, -20000000), Immediate(300000000));
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__ test_b(edx, Operand(ecx, ebx, times_2, 1000));
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__ test_b(Operand(eax, -20), Immediate(0x9A));
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__ nop();
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__ xor_(edx, 12345);
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__ xor_(edx, Operand(ebx, ecx, times_8, 10000));
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__ bts(Operand(ebx, ecx, times_8, 10000), edx);
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__ hlt();
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__ int3();
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__ ret(0);
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__ ret(8);
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// Calls
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Label L1, L2;
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__ bind(&L1);
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__ nop();
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__ call(&L1);
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__ call(&L2);
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__ nop();
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__ bind(&L2);
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__ call(Operand(ebx, ecx, times_4, 10000));
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__ nop();
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Handle<Code> ic = BUILTIN_CODE(isolate, LoadIC);
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__ call(ic, RelocInfo::CODE_TARGET);
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__ nop();
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__ call(FUNCTION_ADDR(DummyStaticFunction), RelocInfo::RUNTIME_ENTRY);
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__ nop();
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__ jmp(&L1);
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__ jmp(Operand(ebx, ecx, times_4, 10000));
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__ jmp(ic, RelocInfo::CODE_TARGET);
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__ nop();
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Label Ljcc;
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__ nop();
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// long jumps
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__ j(overflow, &Ljcc);
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__ j(no_overflow, &Ljcc);
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__ j(below, &Ljcc);
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__ j(above_equal, &Ljcc);
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__ j(equal, &Ljcc);
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__ j(not_equal, &Ljcc);
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__ j(below_equal, &Ljcc);
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__ j(above, &Ljcc);
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__ j(sign, &Ljcc);
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__ j(not_sign, &Ljcc);
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__ j(parity_even, &Ljcc);
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__ j(parity_odd, &Ljcc);
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__ j(less, &Ljcc);
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__ j(greater_equal, &Ljcc);
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__ j(less_equal, &Ljcc);
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__ j(greater, &Ljcc);
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__ nop();
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__ bind(&Ljcc);
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// short jumps
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__ j(overflow, &Ljcc);
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__ j(no_overflow, &Ljcc);
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__ j(below, &Ljcc);
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__ j(above_equal, &Ljcc);
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__ j(equal, &Ljcc);
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__ j(not_equal, &Ljcc);
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__ j(below_equal, &Ljcc);
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__ j(above, &Ljcc);
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__ j(sign, &Ljcc);
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__ j(not_sign, &Ljcc);
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__ j(parity_even, &Ljcc);
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__ j(parity_odd, &Ljcc);
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__ j(less, &Ljcc);
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__ j(greater_equal, &Ljcc);
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__ j(less_equal, &Ljcc);
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__ j(greater, &Ljcc);
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// 0xD9 instructions
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__ nop();
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__ fld(1);
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__ fld1();
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__ fldz();
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__ fldpi();
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__ fabs();
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__ fchs();
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__ fprem();
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__ fprem1();
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__ fincstp();
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__ ftst();
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__ fxch(3);
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__ fld_s(Operand(ebx, ecx, times_4, 10000));
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__ fstp_s(Operand(ebx, ecx, times_4, 10000));
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__ ffree(3);
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__ fld_d(Operand(ebx, ecx, times_4, 10000));
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__ fstp_d(Operand(ebx, ecx, times_4, 10000));
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__ nop();
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__ fild_s(Operand(ebx, ecx, times_4, 10000));
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__ fistp_s(Operand(ebx, ecx, times_4, 10000));
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__ fild_d(Operand(ebx, ecx, times_4, 10000));
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__ fistp_d(Operand(ebx, ecx, times_4, 10000));
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__ fnstsw_ax();
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__ nop();
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__ fadd(3);
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__ fsub(3);
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__ fmul(3);
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__ fdiv(3);
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__ faddp(3);
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__ fsubp(3);
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__ fmulp(3);
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__ fdivp(3);
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__ fcompp();
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__ fwait();
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__ frndint();
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__ fninit();
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__ nop();
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// SSE instruction
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{
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// Move operation
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__ movaps(xmm0, xmm1);
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__ movups(xmm0, xmm1);
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__ movups(xmm0, Operand(edx, 4));
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__ movups(Operand(edx, 4), xmm0);
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__ shufps(xmm0, xmm0, 0x0);
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__ cvtsd2ss(xmm0, xmm1);
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__ cvtsd2ss(xmm0, Operand(ebx, ecx, times_4, 10000));
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// logic operation
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__ andps(xmm0, xmm1);
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__ andps(xmm0, Operand(ebx, ecx, times_4, 10000));
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__ orps(xmm0, xmm1);
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__ orps(xmm0, Operand(ebx, ecx, times_4, 10000));
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__ xorps(xmm0, xmm1);
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__ xorps(xmm0, Operand(ebx, ecx, times_4, 10000));
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// Arithmetic operation
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__ addss(xmm1, xmm0);
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__ addss(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ mulss(xmm1, xmm0);
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__ mulss(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ subss(xmm1, xmm0);
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__ subss(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ divss(xmm1, xmm0);
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__ divss(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ maxss(xmm1, xmm0);
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__ maxss(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ minss(xmm1, xmm0);
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__ minss(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ sqrtss(xmm1, xmm0);
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__ sqrtss(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ addps(xmm1, xmm0);
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__ addps(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ subps(xmm1, xmm0);
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__ subps(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ mulps(xmm1, xmm0);
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__ mulps(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ divps(xmm1, xmm0);
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__ divps(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ minps(xmm1, xmm0);
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__ minps(xmm1, Operand(ebx, ecx, times_4, 10000));
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__ maxps(xmm1, xmm0);
|
|
__ maxps(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ rcpps(xmm1, xmm0);
|
|
__ rcpps(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ rsqrtps(xmm1, xmm0);
|
|
__ rsqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ cmpeqps(xmm5, xmm1);
|
|
__ cmpeqps(xmm5, Operand(ebx, ecx, times_4, 10000));
|
|
__ cmpltps(xmm5, xmm1);
|
|
__ cmpltps(xmm5, Operand(ebx, ecx, times_4, 10000));
|
|
__ cmpleps(xmm5, xmm1);
|
|
__ cmpleps(xmm5, Operand(ebx, ecx, times_4, 10000));
|
|
__ cmpneqps(xmm5, xmm1);
|
|
__ cmpneqps(xmm5, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ ucomiss(xmm0, xmm1);
|
|
__ ucomiss(xmm0, Operand(ebx, ecx, times_4, 10000));
|
|
}
|
|
{
|
|
__ cvttss2si(edx, Operand(ebx, ecx, times_4, 10000));
|
|
__ cvtsi2sd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ cvtss2sd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ cvtss2sd(xmm1, xmm0);
|
|
__ cvtdq2ps(xmm1, xmm0);
|
|
__ cvtdq2ps(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ cvttps2dq(xmm1, xmm0);
|
|
__ cvttps2dq(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ movsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ movsd(Operand(ebx, ecx, times_4, 10000), xmm1);
|
|
// 128 bit move instructions.
|
|
__ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000));
|
|
__ movdqa(Operand(ebx, ecx, times_4, 10000), xmm0);
|
|
__ movdqu(xmm0, Operand(ebx, ecx, times_4, 10000));
|
|
__ movdqu(Operand(ebx, ecx, times_4, 10000), xmm0);
|
|
|
|
__ movd(xmm0, edi);
|
|
__ movd(xmm0, Operand(ebx, ecx, times_4, 10000));
|
|
__ movd(eax, xmm1);
|
|
__ movd(Operand(ebx, ecx, times_4, 10000), xmm1);
|
|
|
|
__ addsd(xmm1, xmm0);
|
|
__ addsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ mulsd(xmm1, xmm0);
|
|
__ mulsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ subsd(xmm1, xmm0);
|
|
__ subsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ divsd(xmm1, xmm0);
|
|
__ divsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ minsd(xmm1, xmm0);
|
|
__ minsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ maxsd(xmm1, xmm0);
|
|
__ maxsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ ucomisd(xmm0, xmm1);
|
|
__ cmpltsd(xmm0, xmm1);
|
|
|
|
__ andpd(xmm0, xmm1);
|
|
|
|
__ psllw(xmm0, 17);
|
|
__ pslld(xmm0, 17);
|
|
__ psrlw(xmm0, 17);
|
|
__ psrld(xmm0, 17);
|
|
__ psraw(xmm0, 17);
|
|
__ psrad(xmm0, 17);
|
|
__ psllq(xmm0, 17);
|
|
__ psllq(xmm0, xmm1);
|
|
__ psrlq(xmm0, 17);
|
|
__ psrlq(xmm0, xmm1);
|
|
|
|
__ pshuflw(xmm5, xmm1, 5);
|
|
__ pshuflw(xmm5, Operand(edx, 4), 5);
|
|
__ pshufd(xmm5, xmm1, 5);
|
|
__ pshufd(xmm5, Operand(edx, 4), 5);
|
|
__ pinsrw(xmm5, edx, 5);
|
|
__ pinsrw(xmm5, Operand(edx, 4), 5);
|
|
|
|
#define EMIT_SSE2_INSTR(instruction, notUsed1, notUsed2, notUsed3) \
|
|
__ instruction(xmm5, xmm1); \
|
|
__ instruction(xmm5, Operand(edx, 4));
|
|
|
|
SSE2_INSTRUCTION_LIST(EMIT_SSE2_INSTR)
|
|
#undef EMIT_SSE2_INSTR
|
|
}
|
|
|
|
// cmov.
|
|
{
|
|
__ cmov(overflow, eax, Operand(eax, 0));
|
|
__ cmov(no_overflow, eax, Operand(eax, 1));
|
|
__ cmov(below, eax, Operand(eax, 2));
|
|
__ cmov(above_equal, eax, Operand(eax, 3));
|
|
__ cmov(equal, eax, Operand(ebx, 0));
|
|
__ cmov(not_equal, eax, Operand(ebx, 1));
|
|
__ cmov(below_equal, eax, Operand(ebx, 2));
|
|
__ cmov(above, eax, Operand(ebx, 3));
|
|
__ cmov(sign, eax, Operand(ecx, 0));
|
|
__ cmov(not_sign, eax, Operand(ecx, 1));
|
|
__ cmov(parity_even, eax, Operand(ecx, 2));
|
|
__ cmov(parity_odd, eax, Operand(ecx, 3));
|
|
__ cmov(less, eax, Operand(edx, 0));
|
|
__ cmov(greater_equal, eax, Operand(edx, 1));
|
|
__ cmov(less_equal, eax, Operand(edx, 2));
|
|
__ cmov(greater, eax, Operand(edx, 3));
|
|
}
|
|
|
|
#define EMIT_SSE34_INSTR(instruction, notUsed1, notUsed2, notUsed3, notUsed4) \
|
|
__ instruction(xmm5, xmm1); \
|
|
__ instruction(xmm5, Operand(edx, 4));
|
|
|
|
{
|
|
if (CpuFeatures::IsSupported(SSSE3)) {
|
|
CpuFeatureScope scope(&assm, SSSE3);
|
|
SSSE3_INSTRUCTION_LIST(EMIT_SSE34_INSTR)
|
|
}
|
|
}
|
|
|
|
{
|
|
if (CpuFeatures::IsSupported(SSE4_1)) {
|
|
CpuFeatureScope scope(&assm, SSE4_1);
|
|
__ pextrb(eax, xmm0, 1);
|
|
__ pextrb(Operand(edx, 4), xmm0, 1);
|
|
__ pextrw(eax, xmm0, 1);
|
|
__ pextrw(Operand(edx, 4), xmm0, 1);
|
|
__ pextrd(eax, xmm0, 1);
|
|
__ pextrd(Operand(edx, 4), xmm0, 1);
|
|
__ pinsrb(xmm1, eax, 0);
|
|
__ pinsrb(xmm1, Operand(edx, 4), 0);
|
|
__ pinsrd(xmm1, eax, 0);
|
|
__ pinsrd(xmm1, Operand(edx, 4), 0);
|
|
__ extractps(eax, xmm1, 0);
|
|
|
|
SSE4_INSTRUCTION_LIST(EMIT_SSE34_INSTR)
|
|
}
|
|
}
|
|
#undef EMIT_SSE34_INSTR
|
|
|
|
// AVX instruction
|
|
{
|
|
if (CpuFeatures::IsSupported(AVX)) {
|
|
CpuFeatureScope scope(&assm, AVX);
|
|
__ vaddsd(xmm0, xmm1, xmm2);
|
|
__ vaddsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmulsd(xmm0, xmm1, xmm2);
|
|
__ vmulsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vsubsd(xmm0, xmm1, xmm2);
|
|
__ vsubsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vdivsd(xmm0, xmm1, xmm2);
|
|
__ vdivsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vminsd(xmm0, xmm1, xmm2);
|
|
__ vminsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmaxsd(xmm0, xmm1, xmm2);
|
|
__ vmaxsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vaddss(xmm0, xmm1, xmm2);
|
|
__ vaddss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmulss(xmm0, xmm1, xmm2);
|
|
__ vmulss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vsubss(xmm0, xmm1, xmm2);
|
|
__ vsubss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vdivss(xmm0, xmm1, xmm2);
|
|
__ vdivss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vminss(xmm0, xmm1, xmm2);
|
|
__ vminss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmaxss(xmm0, xmm1, xmm2);
|
|
__ vmaxss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vandps(xmm0, xmm1, xmm2);
|
|
__ vandps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vxorps(xmm0, xmm1, xmm2);
|
|
__ vxorps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vaddps(xmm0, xmm1, xmm2);
|
|
__ vaddps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmulps(xmm0, xmm1, xmm2);
|
|
__ vmulps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vsubps(xmm0, xmm1, xmm2);
|
|
__ vsubps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vminps(xmm0, xmm1, xmm2);
|
|
__ vminps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vdivps(xmm0, xmm1, xmm2);
|
|
__ vdivps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmaxps(xmm0, xmm1, xmm2);
|
|
__ vmaxps(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vrcpps(xmm1, xmm0);
|
|
__ vrcpps(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vrsqrtps(xmm1, xmm0);
|
|
__ vrsqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vcmpeqps(xmm5, xmm4, xmm1);
|
|
__ vcmpeqps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
|
|
__ vcmpltps(xmm5, xmm4, xmm1);
|
|
__ vcmpltps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
|
|
__ vcmpleps(xmm5, xmm4, xmm1);
|
|
__ vcmpleps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
|
|
__ vcmpneqps(xmm5, xmm4, xmm1);
|
|
__ vcmpneqps(xmm5, xmm4, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vandpd(xmm0, xmm1, xmm2);
|
|
__ vandpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vxorpd(xmm0, xmm1, xmm2);
|
|
__ vxorpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vaddpd(xmm0, xmm1, xmm2);
|
|
__ vaddpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmulpd(xmm0, xmm1, xmm2);
|
|
__ vmulpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vsubpd(xmm0, xmm1, xmm2);
|
|
__ vsubpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vminpd(xmm0, xmm1, xmm2);
|
|
__ vminpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vdivpd(xmm0, xmm1, xmm2);
|
|
__ vdivpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmaxpd(xmm0, xmm1, xmm2);
|
|
__ vmaxpd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vpsllw(xmm0, xmm7, 21);
|
|
__ vpslld(xmm0, xmm7, 21);
|
|
__ vpsrlw(xmm0, xmm7, 21);
|
|
__ vpsrld(xmm0, xmm7, 21);
|
|
__ vpsraw(xmm0, xmm7, 21);
|
|
__ vpsrad(xmm0, xmm7, 21);
|
|
|
|
__ vpshuflw(xmm5, xmm1, 5);
|
|
__ vpshuflw(xmm5, Operand(edx, 4), 5);
|
|
__ vpshufd(xmm5, xmm1, 5);
|
|
__ vpshufd(xmm5, Operand(edx, 4), 5);
|
|
__ vpextrb(eax, xmm0, 1);
|
|
__ vpextrb(Operand(edx, 4), xmm0, 1);
|
|
__ vpextrw(eax, xmm0, 1);
|
|
__ vpextrw(Operand(edx, 4), xmm0, 1);
|
|
__ vpextrd(eax, xmm0, 1);
|
|
__ vpextrd(Operand(edx, 4), xmm0, 1);
|
|
__ vpinsrb(xmm0, xmm1, eax, 0);
|
|
__ vpinsrb(xmm0, xmm1, Operand(edx, 4), 0);
|
|
__ vpinsrw(xmm0, xmm1, eax, 0);
|
|
__ vpinsrw(xmm0, xmm1, Operand(edx, 4), 0);
|
|
__ vpinsrd(xmm0, xmm1, eax, 0);
|
|
__ vpinsrd(xmm0, xmm1, Operand(edx, 4), 0);
|
|
|
|
__ vcvtdq2ps(xmm1, xmm0);
|
|
__ vcvtdq2ps(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vcvttps2dq(xmm1, xmm0);
|
|
__ vcvttps2dq(xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vmovd(xmm0, edi);
|
|
__ vmovd(xmm0, Operand(ebx, ecx, times_4, 10000));
|
|
__ vmovd(eax, xmm1);
|
|
__ vmovd(Operand(ebx, ecx, times_4, 10000), xmm1);
|
|
#define EMIT_SSE2_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3) \
|
|
__ v##instruction(xmm7, xmm5, xmm1); \
|
|
__ v##instruction(xmm7, xmm5, Operand(edx, 4));
|
|
|
|
SSE2_INSTRUCTION_LIST(EMIT_SSE2_AVXINSTR)
|
|
#undef EMIT_SSE2_AVXINSTR
|
|
|
|
#define EMIT_SSE34_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3, \
|
|
notUsed4) \
|
|
__ v##instruction(xmm7, xmm5, xmm1); \
|
|
__ v##instruction(xmm7, xmm5, Operand(edx, 4));
|
|
|
|
SSSE3_INSTRUCTION_LIST(EMIT_SSE34_AVXINSTR)
|
|
SSE4_INSTRUCTION_LIST(EMIT_SSE34_AVXINSTR)
|
|
#undef EMIT_SSE34_AVXINSTR
|
|
}
|
|
}
|
|
|
|
// FMA3 instruction
|
|
{
|
|
if (CpuFeatures::IsSupported(FMA3)) {
|
|
CpuFeatureScope scope(&assm, FMA3);
|
|
__ vfmadd132sd(xmm0, xmm1, xmm2);
|
|
__ vfmadd132sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmadd213sd(xmm0, xmm1, xmm2);
|
|
__ vfmadd213sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmadd231sd(xmm0, xmm1, xmm2);
|
|
__ vfmadd231sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vfmsub132sd(xmm0, xmm1, xmm2);
|
|
__ vfmsub132sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmsub213sd(xmm0, xmm1, xmm2);
|
|
__ vfmsub213sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmsub231sd(xmm0, xmm1, xmm2);
|
|
__ vfmsub231sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vfnmadd132sd(xmm0, xmm1, xmm2);
|
|
__ vfnmadd132sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmadd213sd(xmm0, xmm1, xmm2);
|
|
__ vfnmadd213sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmadd231sd(xmm0, xmm1, xmm2);
|
|
__ vfnmadd231sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vfnmsub132sd(xmm0, xmm1, xmm2);
|
|
__ vfnmsub132sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmsub213sd(xmm0, xmm1, xmm2);
|
|
__ vfnmsub213sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmsub231sd(xmm0, xmm1, xmm2);
|
|
__ vfnmsub231sd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vfmadd132ss(xmm0, xmm1, xmm2);
|
|
__ vfmadd132ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmadd213ss(xmm0, xmm1, xmm2);
|
|
__ vfmadd213ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmadd231ss(xmm0, xmm1, xmm2);
|
|
__ vfmadd231ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vfmsub132ss(xmm0, xmm1, xmm2);
|
|
__ vfmsub132ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmsub213ss(xmm0, xmm1, xmm2);
|
|
__ vfmsub213ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfmsub231ss(xmm0, xmm1, xmm2);
|
|
__ vfmsub231ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vfnmadd132ss(xmm0, xmm1, xmm2);
|
|
__ vfnmadd132ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmadd213ss(xmm0, xmm1, xmm2);
|
|
__ vfnmadd213ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmadd231ss(xmm0, xmm1, xmm2);
|
|
__ vfnmadd231ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
|
|
__ vfnmsub132ss(xmm0, xmm1, xmm2);
|
|
__ vfnmsub132ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmsub213ss(xmm0, xmm1, xmm2);
|
|
__ vfnmsub213ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
__ vfnmsub231ss(xmm0, xmm1, xmm2);
|
|
__ vfnmsub231ss(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
|
|
}
|
|
}
|
|
|
|
// BMI1 instructions
|
|
{
|
|
if (CpuFeatures::IsSupported(BMI1)) {
|
|
CpuFeatureScope scope(&assm, BMI1);
|
|
__ andn(eax, ebx, ecx);
|
|
__ andn(eax, ebx, Operand(ebx, ecx, times_4, 10000));
|
|
__ bextr(eax, ebx, ecx);
|
|
__ bextr(eax, Operand(ebx, ecx, times_4, 10000), ebx);
|
|
__ blsi(eax, ebx);
|
|
__ blsi(eax, Operand(ebx, ecx, times_4, 10000));
|
|
__ blsmsk(eax, ebx);
|
|
__ blsmsk(eax, Operand(ebx, ecx, times_4, 10000));
|
|
__ blsr(eax, ebx);
|
|
__ blsr(eax, Operand(ebx, ecx, times_4, 10000));
|
|
__ tzcnt(eax, ebx);
|
|
__ tzcnt(eax, Operand(ebx, ecx, times_4, 10000));
|
|
}
|
|
}
|
|
|
|
// LZCNT instructions
|
|
{
|
|
if (CpuFeatures::IsSupported(LZCNT)) {
|
|
CpuFeatureScope scope(&assm, LZCNT);
|
|
__ lzcnt(eax, ebx);
|
|
__ lzcnt(eax, Operand(ebx, ecx, times_4, 10000));
|
|
}
|
|
}
|
|
|
|
// POPCNT instructions
|
|
{
|
|
if (CpuFeatures::IsSupported(POPCNT)) {
|
|
CpuFeatureScope scope(&assm, POPCNT);
|
|
__ popcnt(eax, ebx);
|
|
__ popcnt(eax, Operand(ebx, ecx, times_4, 10000));
|
|
}
|
|
}
|
|
|
|
// BMI2 instructions
|
|
{
|
|
if (CpuFeatures::IsSupported(BMI2)) {
|
|
CpuFeatureScope scope(&assm, BMI2);
|
|
__ bzhi(eax, ebx, ecx);
|
|
__ bzhi(eax, Operand(ebx, ecx, times_4, 10000), ebx);
|
|
__ mulx(eax, ebx, ecx);
|
|
__ mulx(eax, ebx, Operand(ebx, ecx, times_4, 10000));
|
|
__ pdep(eax, ebx, ecx);
|
|
__ pdep(eax, ebx, Operand(ebx, ecx, times_4, 10000));
|
|
__ pext(eax, ebx, ecx);
|
|
__ pext(eax, ebx, Operand(ebx, ecx, times_4, 10000));
|
|
__ sarx(eax, ebx, ecx);
|
|
__ sarx(eax, Operand(ebx, ecx, times_4, 10000), ebx);
|
|
__ shlx(eax, ebx, ecx);
|
|
__ shlx(eax, Operand(ebx, ecx, times_4, 10000), ebx);
|
|
__ shrx(eax, ebx, ecx);
|
|
__ shrx(eax, Operand(ebx, ecx, times_4, 10000), ebx);
|
|
__ rorx(eax, ebx, 31);
|
|
__ rorx(eax, Operand(ebx, ecx, times_4, 10000), 31);
|
|
}
|
|
}
|
|
|
|
// xchg.
|
|
{
|
|
__ xchg_b(eax, Operand(eax, 8));
|
|
__ xchg_w(eax, Operand(ebx, 8));
|
|
__ xchg(eax, eax);
|
|
__ xchg(eax, ebx);
|
|
__ xchg(ebx, ebx);
|
|
__ xchg(ebx, Operand(esp, 12));
|
|
}
|
|
|
|
// cmpxchg.
|
|
{
|
|
__ cmpxchg_b(Operand(esp, 12), eax);
|
|
__ cmpxchg_w(Operand(ebx, ecx, times_4, 10000), eax);
|
|
__ cmpxchg(Operand(ebx, ecx, times_4, 10000), eax);
|
|
}
|
|
|
|
// lock prefix.
|
|
{
|
|
__ lock();
|
|
__ cmpxchg(Operand(esp, 12), ebx);
|
|
|
|
__ lock();
|
|
__ xchg_w(eax, Operand(ecx, 8));
|
|
}
|
|
|
|
// Nop instructions
|
|
for (int i = 0; i < 16; i++) {
|
|
__ Nop(i);
|
|
}
|
|
|
|
__ ret(0);
|
|
|
|
CodeDesc desc;
|
|
assm.GetCode(isolate, &desc);
|
|
Handle<Code> code =
|
|
isolate->factory()->NewCode(desc, Code::STUB, Handle<Code>());
|
|
USE(code);
|
|
#ifdef OBJECT_PRINT
|
|
OFStream os(stdout);
|
|
code->Print(os);
|
|
byte* begin = code->instruction_start();
|
|
byte* end = begin + code->instruction_size();
|
|
disasm::Disassembler::Disassemble(stdout, begin, end);
|
|
#endif
|
|
}
|
|
|
|
#undef __
|
|
|
|
} // namespace internal
|
|
} // namespace v8
|