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sgjesse@chromium.org 1ae585b0a2 Support both TOS register combinations in inlined keyed load
When popping key and receiver for an inlined keyed load support either order of r0/r1. The possible swap to have key in r0 and receiver in r1 is postponed to the deferred code calling the keyed load IC.
Review URL: http://codereview.chromium.org/1992012

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4634 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2010-05-10 13:23:42 +00:00
benchmarks Remove svn:executable flag from run.html and style.css and change the mime-type of style.css to text/css. 2009-07-15 10:37:10 +00:00
include Export SetResourceConstraints so it can be used with 2010-05-10 06:24:18 +00:00
samples Fix typo in process sample. The initialization of the map template is 2010-05-08 14:45:32 +00:00
src Support both TOS register combinations in inlined keyed load 2010-05-10 13:23:42 +00:00
test Implement fast load and call of arguments in the presence of eval. 2010-05-10 12:20:06 +00:00
tools First step towards making JumpTarget work on ARM. Instead 2010-05-10 11:32:25 +00:00
.gitignore Add '.cpplint-cache' to ignore lists for SVN and Git. This change also sets 'ignore' property on '.', although this change isn't visible in Rietveld. 2009-12-11 09:01:38 +00:00
AUTHORS Add ldrd and strd instructions to the ARM port. This is a 2010-05-07 20:02:57 +00:00
ChangeLog Prepare push to trunk. We are now vorking on version 2.2.10. 2010-05-10 07:04:43 +00:00
LICENSE Get rid of duplicate LICENSE entry for the Valgrind 2009-09-27 09:33:11 +00:00
SConstruct Allow unaligned memory accesses on ARM targets that support it. 2010-05-06 12:49:12 +00:00