2816e8a899
Implemented using a jump-table, for constant time lookup. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@343 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
2049 lines
46 KiB
C++
2049 lines
46 KiB
C++
// Copyright (c) 1994-2006 Sun Microsystems Inc.
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// All Rights Reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// - Redistribution in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// - Neither the name of Sun Microsystems or the names of contributors may
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// be used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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// COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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// HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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// OF THE POSSIBILITY OF SUCH DAMAGE.
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// The original source code covered by the above license above has been modified
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// significantly by Google Inc.
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// Copyright 2006-2008 the V8 project authors. All rights reserved.
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#include "v8.h"
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#include "disassembler.h"
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#include "macro-assembler.h"
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#include "serialize.h"
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namespace v8 { namespace internal {
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// -----------------------------------------------------------------------------
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// Implementation of Register
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Register eax = { 0 };
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Register ecx = { 1 };
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Register edx = { 2 };
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Register ebx = { 3 };
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Register esp = { 4 };
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Register ebp = { 5 };
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Register esi = { 6 };
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Register edi = { 7 };
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Register no_reg = { -1 };
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XMMRegister xmm0 = { 0 };
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XMMRegister xmm1 = { 1 };
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XMMRegister xmm2 = { 2 };
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XMMRegister xmm3 = { 3 };
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XMMRegister xmm4 = { 4 };
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XMMRegister xmm5 = { 5 };
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XMMRegister xmm6 = { 6 };
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XMMRegister xmm7 = { 7 };
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// -----------------------------------------------------------------------------
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// Implementation of CpuFeatures
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// Safe default is no features.
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uint32_t CpuFeatures::supported_ = 0;
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uint32_t CpuFeatures::enabled_ = 0;
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typedef int (*F0)();
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// The Probe method needs executable memory, so it uses Heap::CreateCode.
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// Allocation failure is silent and leads to safe default.
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void CpuFeatures::Probe() {
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supported_ = 0;
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if (Serializer::enabled()) return; // No features if we might serialize.
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Assembler assm(NULL, 0);
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Label done;
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#define __ assm.
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// Save old esp, since we are going to modify the stack.
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__ push(ebp);
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__ pushfd();
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__ push(ecx);
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__ push(edx);
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__ push(ebx);
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__ mov(ebp, Operand(esp));
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// If we can modify bit 21 of the EFLAGS register, then CPUID is supported.
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__ pushfd();
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__ pop(eax);
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__ mov(edx, Operand(eax));
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__ xor_(eax, 0x200000); // Flip bit 21.
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__ push(eax);
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__ popfd();
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__ pushfd();
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__ pop(eax);
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__ xor_(eax, Operand(edx)); // Different if CPUID is supported.
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__ j(zero, &done);
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// Invoke CPUID with 1 in eax to get feature information in edx.
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__ mov(eax, 1);
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// Temporarily force CPUID support, since we know it is safe here.
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supported_ = (1 << CPUID);
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{ Scope fscope(CPUID);
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__ cpuid();
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}
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supported_ = 0;
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// Return result in eax.
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__ mov(eax, Operand(edx));
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__ bind(&done);
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__ mov(esp, Operand(ebp));
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__ pop(ebx);
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__ pop(edx);
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__ pop(ecx);
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__ popfd();
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__ pop(ebp);
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__ ret(0);
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#undef __
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CodeDesc desc;
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assm.GetCode(&desc);
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Object* code = Heap::CreateCode(desc, NULL, Code::ComputeFlags(Code::STUB));
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if (!code->IsCode()) return;
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F0 f = FUNCTION_CAST<F0>(Code::cast(code)->entry());
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uint32_t res = f();
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supported_ = (res | (1 << CPUID));
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}
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// -----------------------------------------------------------------------------
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// Implementation of Displacement
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void Displacement::init(Label* L, Type type) {
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ASSERT(!L->is_bound());
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int next = 0;
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if (L->is_linked()) {
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next = L->pos();
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ASSERT(next > 0); // Displacements must be at positions > 0
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}
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// Ensure that we _never_ overflow the next field.
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ASSERT(NextField::is_valid(Assembler::kMaximalBufferSize));
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data_ = NextField::encode(next) | TypeField::encode(type);
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}
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// -----------------------------------------------------------------------------
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// Implementation of RelocInfo
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const int RelocInfo::kApplyMask =
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RelocInfo::kCodeTargetMask | 1 << runtime_entry |
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1 << js_return | 1 << internal_reference;
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void RelocInfo::patch_code(byte* instructions, int instruction_count) {
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// Patch the code at the current address with the supplied instructions.
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for (int i = 0; i < instruction_count; i++) {
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*(pc_ + i) = *(instructions + i);
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}
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}
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// Patch the code at the current PC with a call to the target address.
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// Additional guard int3 instructions can be added if required.
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void RelocInfo::patch_code_with_call(Address target, int guard_bytes) {
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// Call instruction takes up 5 bytes and int3 takes up one byte.
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int code_size = 5 + guard_bytes;
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// Patch the code.
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CodePatcher patcher(pc_, code_size);
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patcher.masm()->call(target, no_reloc);
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// Add the requested number of int3 instructions after the call.
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for (int i = 0; i < guard_bytes; i++) {
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patcher.masm()->int3();
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}
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}
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// -----------------------------------------------------------------------------
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// Implementation of Operand
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Operand::Operand(Register base, int32_t disp, RelocMode rmode) {
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// [base + disp/r]
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if (disp == 0 && rmode == no_reloc && !base.is(ebp)) {
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// [base]
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set_modrm(0, base);
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if (base.is(esp)) set_sib(times_1, esp, base);
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} else if (is_int8(disp) && rmode == no_reloc) {
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// [base + disp8]
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set_modrm(1, base);
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if (base.is(esp)) set_sib(times_1, esp, base);
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set_disp8(disp);
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} else {
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// [base + disp/r]
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set_modrm(2, base);
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if (base.is(esp)) set_sib(times_1, esp, base);
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set_dispr(disp, rmode);
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}
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}
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Operand::Operand(Register base,
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Register index,
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ScaleFactor scale,
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int32_t disp,
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RelocMode rmode) {
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ASSERT(!index.is(esp)); // illegal addressing mode
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// [base + index*scale + disp/r]
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if (disp == 0 && rmode == no_reloc && !base.is(ebp)) {
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// [base + index*scale]
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set_modrm(0, esp);
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set_sib(scale, index, base);
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} else if (is_int8(disp) && rmode == no_reloc) {
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// [base + index*scale + disp8]
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set_modrm(1, esp);
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set_sib(scale, index, base);
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set_disp8(disp);
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} else {
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// [base + index*scale + disp/r]
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set_modrm(2, esp);
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set_sib(scale, index, base);
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set_dispr(disp, rmode);
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}
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}
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Operand::Operand(Register index,
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ScaleFactor scale,
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int32_t disp,
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RelocMode rmode) {
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ASSERT(!index.is(esp)); // illegal addressing mode
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// [index*scale + disp/r]
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set_modrm(0, esp);
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set_sib(scale, index, ebp);
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set_dispr(disp, rmode);
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}
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void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
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ASSERT(len_ == 1);
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ASSERT((scale & -4) == 0);
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buf_[1] = scale << 6 | index.code() << 3 | base.code();
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len_ = 2;
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}
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void Operand::set_disp8(int8_t disp) {
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ASSERT(len_ == 1 || len_ == 2);
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*reinterpret_cast<int8_t*>(&buf_[len_++]) = disp;
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}
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void Operand::set_reg(Register reg) const {
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ASSERT(len_ > 0);
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buf_[0] = (buf_[0] & ~0x38) | static_cast<byte>(reg.code() << 3);
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}
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bool Operand::is_reg(Register reg) const {
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return ((buf_[0] & 0xF8) == 0xC0) // addressing mode is register only.
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&& ((buf_[0] & 0x07) == reg.code()); // register codes match.
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}
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// -----------------------------------------------------------------------------
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// Implementation of Assembler
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// Emit a single byte. Must always be inlined.
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#define EMIT(x) \
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*pc_++ = (x)
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// spare_buffer_
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static byte* spare_buffer_ = NULL;
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Assembler::Assembler(void* buffer, int buffer_size) {
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if (buffer == NULL) {
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// do our own buffer management
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if (buffer_size <= kMinimalBufferSize) {
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buffer_size = kMinimalBufferSize;
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if (spare_buffer_ != NULL) {
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buffer = spare_buffer_;
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spare_buffer_ = NULL;
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}
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}
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if (buffer == NULL) {
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buffer_ = NewArray<byte>(buffer_size);
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} else {
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buffer_ = static_cast<byte*>(buffer);
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}
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buffer_size_ = buffer_size;
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own_buffer_ = true;
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} else {
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// use externally provided buffer instead
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ASSERT(buffer_size > 0);
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buffer_ = static_cast<byte*>(buffer);
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buffer_size_ = buffer_size;
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own_buffer_ = false;
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}
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// Clear the buffer in debug mode unless it was provided by the
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// caller in which case we can't be sure it's okay to overwrite
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// existing code in it; see CodePatcher::CodePatcher(...).
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if (kDebug && own_buffer_) {
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memset(buffer_, 0xCC, buffer_size); // int3
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}
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// setup buffer pointers
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ASSERT(buffer_ != NULL);
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pc_ = buffer_;
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reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
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last_pc_ = NULL;
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last_bound_pos_ = 0;
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last_position_ = kNoPosition;
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last_statement_position_ = kNoPosition;
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}
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Assembler::~Assembler() {
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if (own_buffer_) {
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if (spare_buffer_ == NULL && buffer_size_ == kMinimalBufferSize) {
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spare_buffer_ = buffer_;
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} else {
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DeleteArray(buffer_);
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}
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}
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}
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void Assembler::GetCode(CodeDesc* desc) {
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// finalize code
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if (unbound_label_.is_linked())
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bind_to(&unbound_label_, binding_pos_);
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// (at this point overflow() may be true, but the gap ensures that
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// we are still not overlapping instructions and relocation info)
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ASSERT(pc_ <= reloc_info_writer.pos()); // no overlap
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// setup desc
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desc->buffer = buffer_;
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desc->buffer_size = buffer_size_;
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desc->instr_size = pc_offset();
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desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos();
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Counters::reloc_info_size.Increment(desc->reloc_size);
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}
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void Assembler::Align(int m) {
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ASSERT(IsPowerOf2(m));
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while ((pc_offset() & (m - 1)) != 0) {
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nop();
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}
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}
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void Assembler::cpuid() {
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ASSERT(CpuFeatures::IsEnabled(CpuFeatures::CPUID));
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x0F);
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EMIT(0xA2);
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}
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void Assembler::pushad() {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x60);
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}
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void Assembler::popad() {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x61);
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}
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void Assembler::pushfd() {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x9C);
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}
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void Assembler::popfd() {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x9D);
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}
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void Assembler::push(const Immediate& x) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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if (x.is_int8()) {
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EMIT(0x6a);
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EMIT(x.x_);
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} else {
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EMIT(0x68);
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emit(x);
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}
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}
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void Assembler::push(Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x50 | src.code());
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}
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void Assembler::push(const Operand& src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0xFF);
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emit_operand(esi, src);
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}
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void Assembler::pop(Register dst) {
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ASSERT(reloc_info_writer.last_pc() != NULL);
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if (FLAG_push_pop_elimination && (reloc_info_writer.last_pc() <= last_pc_)) {
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// (last_pc_ != NULL) is rolled into the above check
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// If a last_pc_ is set, we need to make sure that there has not been any
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// relocation information generated between the last instruction and this
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// pop instruction.
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byte instr = last_pc_[0];
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if (instr == (0x50 | dst.code())) {
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pc_ = last_pc_;
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last_pc_ = NULL;
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if (FLAG_print_push_pop_elimination) {
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PrintF("%d push/pop (same reg) eliminated\n", pc_offset());
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}
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return;
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} else if (instr == 0xff) { // push of an operand, convert to a move
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byte op1 = last_pc_[1];
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// Check if the operation is really a push
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if ((op1 & 0x38) == (6 << 3)) {
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op1 = (op1 & ~0x38) | static_cast<byte>(dst.code() << 3);
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last_pc_[0] = 0x8b;
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last_pc_[1] = op1;
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last_pc_ = NULL;
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if (FLAG_print_push_pop_elimination) {
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PrintF("%d push/pop (op->reg) eliminated\n", pc_offset());
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}
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return;
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}
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} else if ((instr == 0x89) &&
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(last_pc_[1] == 0x04) &&
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(last_pc_[2] == 0x24)) {
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// 0x71283c 396 890424 mov [esp],eax
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// 0x71283f 399 58 pop eax
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if (dst.is(eax)) {
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// change to
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// 0x710fac 216 83c404 add esp,0x4
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last_pc_[0] = 0x83;
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last_pc_[1] = 0xc4;
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last_pc_[2] = 0x04;
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last_pc_ = NULL;
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if (FLAG_print_push_pop_elimination) {
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PrintF("%d push/pop (mov-pop) eliminated\n", pc_offset());
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}
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return;
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}
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}
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// Other potential patterns for peephole:
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// 0x712716 102 890424 mov [esp], eax
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// 0x712719 105 8b1424 mov edx, [esp]
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}
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x58 | dst.code());
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}
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void Assembler::pop(const Operand& dst) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x8F);
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emit_operand(eax, dst);
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}
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void Assembler::mov_b(Register dst, const Operand& src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x8A);
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emit_operand(dst, src);
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}
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void Assembler::mov_b(const Operand& dst, int8_t imm8) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0xC6);
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emit_operand(eax, dst);
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EMIT(imm8);
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}
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void Assembler::mov_b(const Operand& dst, Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x88);
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emit_operand(src, dst);
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}
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void Assembler::mov_w(Register dst, const Operand& src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x66);
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EMIT(0x8B);
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emit_operand(dst, src);
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}
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void Assembler::mov_w(const Operand& dst, Register src) {
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EnsureSpace ensure_space(this);
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last_pc_ = pc_;
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EMIT(0x66);
|
|
EMIT(0x89);
|
|
emit_operand(src, dst);
|
|
}
|
|
|
|
|
|
void Assembler::mov(Register dst, int32_t imm32) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xB8 | dst.code());
|
|
emit(imm32);
|
|
}
|
|
|
|
|
|
void Assembler::mov(Register dst, Handle<Object> handle) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xB8 | dst.code());
|
|
emit(handle);
|
|
}
|
|
|
|
|
|
void Assembler::mov(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x8B);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::mov(const Operand& dst, const Immediate& x) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xC7);
|
|
emit_operand(eax, dst);
|
|
emit(x);
|
|
}
|
|
|
|
|
|
void Assembler::mov(const Operand& dst, Handle<Object> handle) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xC7);
|
|
emit_operand(eax, dst);
|
|
emit(handle);
|
|
}
|
|
|
|
|
|
void Assembler::mov(const Operand& dst, Register src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x89);
|
|
emit_operand(src, dst);
|
|
}
|
|
|
|
|
|
void Assembler::movsx_b(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xBE);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::movsx_w(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xBF);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::movzx_b(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xB6);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::movzx_w(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xB7);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::CMOV));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
UNIMPLEMENTED();
|
|
USE(cc);
|
|
USE(dst);
|
|
USE(imm32);
|
|
}
|
|
|
|
|
|
void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::CMOV));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
UNIMPLEMENTED();
|
|
USE(cc);
|
|
USE(dst);
|
|
USE(handle);
|
|
}
|
|
|
|
|
|
void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::CMOV));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
UNIMPLEMENTED();
|
|
USE(cc);
|
|
USE(dst);
|
|
USE(src);
|
|
}
|
|
|
|
|
|
void Assembler::adc(Register dst, int32_t imm32) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(2, Operand(dst), Immediate(imm32));
|
|
}
|
|
|
|
|
|
void Assembler::adc(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x13);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::add(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x03);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::add(const Operand& dst, const Immediate& x) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(0, dst, x);
|
|
}
|
|
|
|
|
|
void Assembler::and_(Register dst, int32_t imm32) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(4, Operand(dst), Immediate(imm32));
|
|
}
|
|
|
|
|
|
void Assembler::and_(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x23);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::and_(const Operand& dst, const Immediate& x) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(4, dst, x);
|
|
}
|
|
|
|
|
|
void Assembler::and_(const Operand& dst, Register src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x21);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::cmp(Register reg, int32_t imm32) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(7, Operand(reg), Immediate(imm32));
|
|
}
|
|
|
|
|
|
void Assembler::cmp(Register reg, Handle<Object> handle) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(7, Operand(reg), Immediate(handle));
|
|
}
|
|
|
|
|
|
void Assembler::cmp(Register reg, const Operand& op) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x3B);
|
|
emit_operand(reg, op);
|
|
}
|
|
|
|
|
|
void Assembler::cmp(const Operand& op, const Immediate& imm) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(7, op, imm);
|
|
}
|
|
|
|
|
|
void Assembler::dec_b(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xFE);
|
|
EMIT(0xC8 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::dec(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x48 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::dec(const Operand& dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xFF);
|
|
emit_operand(ecx, dst);
|
|
}
|
|
|
|
|
|
void Assembler::cdq() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x99);
|
|
}
|
|
|
|
|
|
void Assembler::idiv(Register src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF7);
|
|
EMIT(0xF8 | src.code());
|
|
}
|
|
|
|
|
|
void Assembler::imul(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xAF);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::imul(Register dst, Register src, int32_t imm32) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
if (is_int8(imm32)) {
|
|
EMIT(0x6B);
|
|
EMIT(0xC0 | dst.code() << 3 | src.code());
|
|
EMIT(imm32);
|
|
} else {
|
|
EMIT(0x69);
|
|
EMIT(0xC0 | dst.code() << 3 | src.code());
|
|
emit(imm32);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::inc(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x40 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::inc(const Operand& dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xFF);
|
|
emit_operand(eax, dst);
|
|
}
|
|
|
|
|
|
void Assembler::lea(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x8D);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::mul(Register src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF7);
|
|
EMIT(0xE0 | src.code());
|
|
}
|
|
|
|
|
|
void Assembler::neg(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF7);
|
|
EMIT(0xD8 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::not_(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF7);
|
|
EMIT(0xD0 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::or_(Register dst, int32_t imm32) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(1, Operand(dst), Immediate(imm32));
|
|
}
|
|
|
|
|
|
void Assembler::or_(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0B);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::or_(const Operand& dst, const Immediate& x) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(1, dst, x);
|
|
}
|
|
|
|
|
|
void Assembler::or_(const Operand& dst, Register src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x09);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::rcl(Register dst, uint8_t imm8) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(is_uint5(imm8)); // illegal shift count
|
|
if (imm8 == 1) {
|
|
EMIT(0xD1);
|
|
EMIT(0xD0 | dst.code());
|
|
} else {
|
|
EMIT(0xC1);
|
|
EMIT(0xD0 | dst.code());
|
|
EMIT(imm8);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::sar(Register dst, uint8_t imm8) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(is_uint5(imm8)); // illegal shift count
|
|
if (imm8 == 1) {
|
|
EMIT(0xD1);
|
|
EMIT(0xF8 | dst.code());
|
|
} else {
|
|
EMIT(0xC1);
|
|
EMIT(0xF8 | dst.code());
|
|
EMIT(imm8);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::sar(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD3);
|
|
EMIT(0xF8 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::sbb(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x1B);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::shld(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xA5);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::shl(Register dst, uint8_t imm8) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(is_uint5(imm8)); // illegal shift count
|
|
if (imm8 == 1) {
|
|
EMIT(0xD1);
|
|
EMIT(0xE0 | dst.code());
|
|
} else {
|
|
EMIT(0xC1);
|
|
EMIT(0xE0 | dst.code());
|
|
EMIT(imm8);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::shl(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD3);
|
|
EMIT(0xE0 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::shrd(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xAD);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::shr(Register dst, uint8_t imm8) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(is_uint5(imm8)); // illegal shift count
|
|
EMIT(0xC1);
|
|
EMIT(0xE8 | dst.code());
|
|
EMIT(imm8);
|
|
}
|
|
|
|
|
|
void Assembler::shr(Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD3);
|
|
EMIT(0xE8 | dst.code());
|
|
}
|
|
|
|
|
|
void Assembler::sub(const Operand& dst, const Immediate& x) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(5, dst, x);
|
|
}
|
|
|
|
|
|
void Assembler::sub(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x2B);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::sub(const Operand& dst, Register src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x29);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::test(Register reg, const Immediate& imm) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
// Only use test against byte for registers that have a byte
|
|
// variant: eax, ebx, ecx, and edx.
|
|
if (imm.rmode_ == no_reloc && is_uint8(imm.x_) && reg.code() < 4) {
|
|
uint8_t imm8 = imm.x_;
|
|
if (reg.is(eax)) {
|
|
EMIT(0xA8);
|
|
EMIT(imm8);
|
|
} else {
|
|
emit_arith_b(0xF6, 0xC0, reg, imm8);
|
|
}
|
|
} else {
|
|
// This is not using emit_arith because test doesn't support
|
|
// sign-extension of 8-bit operands.
|
|
if (reg.is(eax)) {
|
|
EMIT(0xA9);
|
|
} else {
|
|
EMIT(0xF7);
|
|
EMIT(0xC0 | reg.code());
|
|
}
|
|
emit(imm);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::test(Register reg, const Operand& op) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x85);
|
|
emit_operand(reg, op);
|
|
}
|
|
|
|
|
|
void Assembler::test(const Operand& op, const Immediate& imm) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF7);
|
|
emit_operand(eax, op);
|
|
emit(imm);
|
|
}
|
|
|
|
|
|
void Assembler::xor_(Register dst, int32_t imm32) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(6, Operand(dst), Immediate(imm32));
|
|
}
|
|
|
|
|
|
void Assembler::xor_(Register dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x33);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::xor_(const Operand& src, Register dst) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x31);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::xor_(const Operand& dst, const Immediate& x) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_arith(6, dst, x);
|
|
}
|
|
|
|
|
|
void Assembler::bts(const Operand& dst, Register src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0xAB);
|
|
emit_operand(src, dst);
|
|
}
|
|
|
|
|
|
void Assembler::hlt() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF4);
|
|
}
|
|
|
|
|
|
void Assembler::int3() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xCC);
|
|
}
|
|
|
|
|
|
void Assembler::nop() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x90);
|
|
}
|
|
|
|
|
|
void Assembler::rdtsc() {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::RDTSC));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x0F);
|
|
EMIT(0x31);
|
|
}
|
|
|
|
|
|
void Assembler::ret(int imm16) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(is_uint16(imm16));
|
|
if (imm16 == 0) {
|
|
EMIT(0xC3);
|
|
} else {
|
|
EMIT(0xC2);
|
|
EMIT(imm16 & 0xFF);
|
|
EMIT((imm16 >> 8) & 0xFF);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::leave() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xC9);
|
|
}
|
|
|
|
|
|
// Labels refer to positions in the (to be) generated code.
|
|
// There are bound, linked, and unused labels.
|
|
//
|
|
// Bound labels refer to known positions in the already
|
|
// generated code. pos() is the position the label refers to.
|
|
//
|
|
// Linked labels refer to unknown positions in the code
|
|
// to be generated; pos() is the position of the 32bit
|
|
// Displacement of the last instruction using the label.
|
|
|
|
|
|
void Assembler::print(Label* L) {
|
|
if (L->is_unused()) {
|
|
PrintF("unused label\n");
|
|
} else if (L->is_bound()) {
|
|
PrintF("bound label to %d\n", L->pos());
|
|
} else if (L->is_linked()) {
|
|
Label l = *L;
|
|
PrintF("unbound label");
|
|
while (l.is_linked()) {
|
|
Displacement disp = disp_at(&l);
|
|
PrintF("@ %d ", l.pos());
|
|
disp.print();
|
|
PrintF("\n");
|
|
disp.next(&l);
|
|
}
|
|
} else {
|
|
PrintF("label in inconsistent state (pos = %d)\n", L->pos_);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::bind_to(Label* L, int pos) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = NULL;
|
|
ASSERT(0 <= pos && pos <= pc_offset()); // must have a valid binding position
|
|
while (L->is_linked()) {
|
|
Displacement disp = disp_at(L);
|
|
int fixup_pos = L->pos();
|
|
if (disp.type() == Displacement::UNCONDITIONAL_JUMP) {
|
|
ASSERT(byte_at(fixup_pos - 1) == 0xE9); // jmp expected
|
|
}
|
|
// relative address, relative to point after address
|
|
int imm32 = pos - (fixup_pos + sizeof(int32_t));
|
|
long_at_put(fixup_pos, imm32);
|
|
disp.next(L);
|
|
}
|
|
L->bind_to(pos);
|
|
|
|
// do not eliminate jump instructions before the last bound position
|
|
if (pos > last_bound_pos_)
|
|
last_bound_pos_ = pos;
|
|
}
|
|
|
|
|
|
void Assembler::link_to(Label* L, Label* appendix) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = NULL;
|
|
if (appendix->is_linked()) {
|
|
if (L->is_linked()) {
|
|
// append appendix to L's list
|
|
Label p;
|
|
Label q = *L;
|
|
do {
|
|
p = q;
|
|
Displacement disp = disp_at(&q);
|
|
disp.next(&q);
|
|
} while (q.is_linked());
|
|
Displacement disp = disp_at(&p);
|
|
disp.link_to(appendix);
|
|
disp_at_put(&p, disp);
|
|
p.Unuse(); // to avoid assertion failure in ~Label
|
|
} else {
|
|
// L is empty, simply use appendix
|
|
*L = *appendix;
|
|
}
|
|
}
|
|
appendix->Unuse(); // appendix should not be used anymore
|
|
}
|
|
|
|
|
|
void Assembler::bind(Label* L) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = NULL;
|
|
ASSERT(!L->is_bound()); // label can only be bound once
|
|
if (FLAG_eliminate_jumps) {
|
|
// Resolve unbound label.
|
|
if (unbound_label_.is_linked()) {
|
|
// Unbound label exists => link it with L if same binding
|
|
// position, otherwise fix it.
|
|
if (binding_pos_ == pc_offset()) {
|
|
// Link it to L's list.
|
|
link_to(L, &unbound_label_);
|
|
} else {
|
|
// Otherwise bind unbound label.
|
|
ASSERT(binding_pos_ < pc_offset());
|
|
bind_to(&unbound_label_, binding_pos_);
|
|
}
|
|
}
|
|
ASSERT(!unbound_label_.is_linked());
|
|
// try to eliminate jumps to next instruction
|
|
const int absolute_jump_size = 5;
|
|
// Do not remove an already bound jump target.
|
|
while (last_bound_pos_ < pc_offset() &&
|
|
reloc_info_writer.last_pc() <= pc_ - absolute_jump_size &&
|
|
L->is_linked() &&
|
|
(L->pos() + static_cast<int>(sizeof(int32_t)) == pc_offset()) &&
|
|
(disp_at(L).type() == Displacement::UNCONDITIONAL_JUMP)) {
|
|
// Previous instruction is jump jumping immediately after it =>
|
|
// eliminate it.
|
|
// jmp expected.
|
|
ASSERT(byte_at(pc_offset() - absolute_jump_size) == 0xE9);
|
|
if (FLAG_print_jump_elimination) {
|
|
PrintF("@ %d jump to next eliminated\n", L->pos());
|
|
}
|
|
// Remove first entry from label list.
|
|
Displacement disp = disp_at(L);
|
|
disp.next(L);
|
|
// Eliminate instruction (set code pointers back).
|
|
pc_ -= absolute_jump_size;
|
|
// Make sure not to skip relocation information when rewinding.
|
|
ASSERT(reloc_info_writer.last_pc() <= pc_);
|
|
}
|
|
// Delay fixup of L => store it as unbound label.
|
|
unbound_label_ = *L;
|
|
binding_pos_ = pc_offset();
|
|
L->Unuse();
|
|
}
|
|
bind_to(L, pc_offset());
|
|
}
|
|
|
|
|
|
void Assembler::call(Label* L) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
if (L->is_bound()) {
|
|
const int long_size = 5;
|
|
int offs = L->pos() - pc_offset();
|
|
ASSERT(offs <= 0);
|
|
// 1110 1000 #32-bit disp
|
|
EMIT(0xE8);
|
|
emit(offs - long_size);
|
|
} else {
|
|
// 1110 1000 #32-bit disp
|
|
EMIT(0xE8);
|
|
emit_disp(L, Displacement::OTHER);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::call(byte* entry, RelocMode rmode) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(!is_code_target(rmode));
|
|
EMIT(0xE8);
|
|
emit(entry - (pc_ + sizeof(int32_t)), rmode);
|
|
}
|
|
|
|
|
|
void Assembler::call(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xFF);
|
|
emit_operand(edx, adr);
|
|
}
|
|
|
|
|
|
void Assembler::call(Handle<Code> code, RelocMode rmode) {
|
|
WriteRecordedPositions();
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(is_code_target(rmode));
|
|
EMIT(0xE8);
|
|
emit(reinterpret_cast<intptr_t>(code.location()), rmode);
|
|
}
|
|
|
|
|
|
void Assembler::jmp(Label* L) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
if (L->is_bound()) {
|
|
const int short_size = 2;
|
|
const int long_size = 5;
|
|
int offs = L->pos() - pc_offset();
|
|
ASSERT(offs <= 0);
|
|
if (is_int8(offs - short_size)) {
|
|
// 1110 1011 #8-bit disp
|
|
EMIT(0xEB);
|
|
EMIT((offs - short_size) & 0xFF);
|
|
} else {
|
|
// 1110 1001 #32-bit disp
|
|
EMIT(0xE9);
|
|
emit(offs - long_size);
|
|
}
|
|
} else {
|
|
if (FLAG_eliminate_jumps &&
|
|
unbound_label_.is_linked() &&
|
|
binding_pos_ == pc_offset()) {
|
|
// Current position is target of jumps
|
|
if (FLAG_print_jump_elimination) {
|
|
PrintF("eliminated jumps/calls to %d from ", binding_pos_);
|
|
print(&unbound_label_);
|
|
}
|
|
link_to(L, &unbound_label_);
|
|
}
|
|
// 1110 1001 #32-bit disp
|
|
EMIT(0xE9);
|
|
emit_disp(L, Displacement::UNCONDITIONAL_JUMP);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::jmp(byte* entry, RelocMode rmode) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(!is_code_target(rmode));
|
|
EMIT(0xE9);
|
|
emit(entry - (pc_ + sizeof(int32_t)), rmode);
|
|
}
|
|
|
|
|
|
void Assembler::jmp(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xFF);
|
|
emit_operand(esp, adr);
|
|
}
|
|
|
|
|
|
void Assembler::jmp(Handle<Code> code, RelocMode rmode) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(is_code_target(rmode));
|
|
EMIT(0xE9);
|
|
emit(reinterpret_cast<intptr_t>(code.location()), rmode);
|
|
}
|
|
|
|
|
|
|
|
void Assembler::j(Condition cc, Label* L, Hint hint) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT(0 <= cc && cc < 16);
|
|
if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
|
if (L->is_bound()) {
|
|
const int short_size = 2;
|
|
const int long_size = 6;
|
|
int offs = L->pos() - pc_offset();
|
|
ASSERT(offs <= 0);
|
|
if (is_int8(offs - short_size)) {
|
|
// 0111 tttn #8-bit disp
|
|
EMIT(0x70 | cc);
|
|
EMIT((offs - short_size) & 0xFF);
|
|
} else {
|
|
// 0000 1111 1000 tttn #32-bit disp
|
|
EMIT(0x0F);
|
|
EMIT(0x80 | cc);
|
|
emit(offs - long_size);
|
|
}
|
|
} else {
|
|
// 0000 1111 1000 tttn #32-bit disp
|
|
// Note: could eliminate cond. jumps to this jump if condition
|
|
// is the same however, seems to be rather unlikely case.
|
|
EMIT(0x0F);
|
|
EMIT(0x80 | cc);
|
|
emit_disp(L, Displacement::OTHER);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::j(Condition cc, byte* entry, RelocMode rmode, Hint hint) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
ASSERT((0 <= cc) && (cc < 16));
|
|
if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
|
// 0000 1111 1000 tttn #32-bit disp
|
|
EMIT(0x0F);
|
|
EMIT(0x80 | cc);
|
|
emit(entry - (pc_ + sizeof(int32_t)), rmode);
|
|
}
|
|
|
|
|
|
void Assembler::j(Condition cc, Handle<Code> code, Hint hint) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
|
// 0000 1111 1000 tttn #32-bit disp
|
|
EMIT(0x0F);
|
|
EMIT(0x80 | cc);
|
|
emit(reinterpret_cast<intptr_t>(code.location()), code_target);
|
|
}
|
|
|
|
|
|
// FPU instructions
|
|
|
|
|
|
void Assembler::fld(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xD9, 0xC0, i);
|
|
}
|
|
|
|
|
|
void Assembler::fld1() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xE8);
|
|
}
|
|
|
|
|
|
void Assembler::fldz() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xEE);
|
|
}
|
|
|
|
|
|
void Assembler::fld_s(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
emit_operand(eax, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fld_d(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDD);
|
|
emit_operand(eax, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fstp_s(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
emit_operand(ebx, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fstp_d(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDD);
|
|
emit_operand(ebx, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fild_s(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDB);
|
|
emit_operand(eax, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fild_d(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDF);
|
|
emit_operand(ebp, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fistp_s(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDB);
|
|
emit_operand(ebx, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fist_s(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDB);
|
|
emit_operand(edx, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fistp_d(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDF);
|
|
emit_operand(edi, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fabs() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xE1);
|
|
}
|
|
|
|
|
|
void Assembler::fchs() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xE0);
|
|
}
|
|
|
|
|
|
void Assembler::fadd(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDC, 0xC0, i);
|
|
}
|
|
|
|
|
|
void Assembler::fsub(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDC, 0xE8, i);
|
|
}
|
|
|
|
|
|
void Assembler::fisub_s(const Operand& adr) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDA);
|
|
emit_operand(esp, adr);
|
|
}
|
|
|
|
|
|
void Assembler::fmul(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDC, 0xC8, i);
|
|
}
|
|
|
|
|
|
void Assembler::fdiv(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDC, 0xF8, i);
|
|
}
|
|
|
|
|
|
void Assembler::faddp(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDE, 0xC0, i);
|
|
}
|
|
|
|
|
|
void Assembler::fsubp(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDE, 0xE8, i);
|
|
}
|
|
|
|
|
|
void Assembler::fsubrp(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDE, 0xE0, i);
|
|
}
|
|
|
|
|
|
void Assembler::fmulp(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDE, 0xC8, i);
|
|
}
|
|
|
|
|
|
void Assembler::fdivp(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDE, 0xF8, i);
|
|
}
|
|
|
|
|
|
void Assembler::fprem() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xF8);
|
|
}
|
|
|
|
|
|
void Assembler::fprem1() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xF5);
|
|
}
|
|
|
|
|
|
void Assembler::fxch(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xD9, 0xC8, i);
|
|
}
|
|
|
|
|
|
void Assembler::fincstp() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xF7);
|
|
}
|
|
|
|
|
|
void Assembler::ffree(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDD, 0xC0, i);
|
|
}
|
|
|
|
|
|
void Assembler::ftst() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xE4);
|
|
}
|
|
|
|
|
|
void Assembler::fucomp(int i) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
emit_farith(0xDD, 0xE8, i);
|
|
}
|
|
|
|
|
|
void Assembler::fucompp() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDA);
|
|
EMIT(0xE9);
|
|
}
|
|
|
|
|
|
void Assembler::fcompp() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xDE);
|
|
EMIT(0xD9);
|
|
}
|
|
|
|
|
|
void Assembler::fnstsw_ax() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xdF);
|
|
EMIT(0xE0);
|
|
}
|
|
|
|
|
|
void Assembler::fwait() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x9B);
|
|
}
|
|
|
|
|
|
void Assembler::frndint() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xD9);
|
|
EMIT(0xFC);
|
|
}
|
|
|
|
|
|
void Assembler::sahf() {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0x9E);
|
|
}
|
|
|
|
|
|
void Assembler::cvttss2si(Register dst, const Operand& src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF3);
|
|
EMIT(0x0F);
|
|
EMIT(0x2C);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::cvttsd2si(Register dst, const Operand& src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2);
|
|
EMIT(0x0F);
|
|
EMIT(0x2C);
|
|
emit_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2);
|
|
EMIT(0x0F);
|
|
EMIT(0x2A);
|
|
emit_sse_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2);
|
|
EMIT(0x0F);
|
|
EMIT(0x58);
|
|
emit_sse_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2);
|
|
EMIT(0x0F);
|
|
EMIT(0x59);
|
|
emit_sse_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2);
|
|
EMIT(0x0F);
|
|
EMIT(0x5C);
|
|
emit_sse_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::divsd(XMMRegister dst, XMMRegister src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2);
|
|
EMIT(0x0F);
|
|
EMIT(0x5E);
|
|
emit_sse_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::movdbl(XMMRegister dst, const Operand& src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
movsd(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::movdbl(const Operand& dst, XMMRegister src) {
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
movsd(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::movsd(const Operand& dst, XMMRegister src ) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2); // double
|
|
EMIT(0x0F);
|
|
EMIT(0x11); // store
|
|
emit_sse_operand(src, dst);
|
|
}
|
|
|
|
|
|
void Assembler::movsd(XMMRegister dst, const Operand& src) {
|
|
ASSERT(CpuFeatures::IsEnabled(CpuFeatures::SSE2));
|
|
EnsureSpace ensure_space(this);
|
|
last_pc_ = pc_;
|
|
EMIT(0xF2); // double
|
|
EMIT(0x0F);
|
|
EMIT(0x10); // load
|
|
emit_sse_operand(dst, src);
|
|
}
|
|
|
|
|
|
void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
|
|
Register ireg = { reg.code() };
|
|
emit_operand(ireg, adr);
|
|
}
|
|
|
|
|
|
void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) {
|
|
EMIT(0xC0 | dst.code() << 3 | src.code());
|
|
}
|
|
|
|
|
|
void Assembler::Print() {
|
|
Disassembler::Decode(stdout, buffer_, pc_);
|
|
}
|
|
|
|
|
|
void Assembler::RecordJSReturn() {
|
|
WriteRecordedPositions();
|
|
EnsureSpace ensure_space(this);
|
|
RecordRelocInfo(js_return);
|
|
}
|
|
|
|
|
|
void Assembler::RecordComment(const char* msg) {
|
|
if (FLAG_debug_code) {
|
|
EnsureSpace ensure_space(this);
|
|
RecordRelocInfo(comment, reinterpret_cast<intptr_t>(msg));
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::RecordPosition(int pos) {
|
|
if (pos == kNoPosition) return;
|
|
ASSERT(pos >= 0);
|
|
last_position_ = pos;
|
|
}
|
|
|
|
|
|
void Assembler::RecordStatementPosition(int pos) {
|
|
if (pos == kNoPosition) return;
|
|
ASSERT(pos >= 0);
|
|
last_statement_position_ = pos;
|
|
}
|
|
|
|
|
|
void Assembler::WriteRecordedPositions() {
|
|
if (last_statement_position_ != kNoPosition) {
|
|
EnsureSpace ensure_space(this);
|
|
RecordRelocInfo(statement_position, last_statement_position_);
|
|
}
|
|
if ((last_position_ != kNoPosition) &&
|
|
(last_position_ != last_statement_position_)) {
|
|
EnsureSpace ensure_space(this);
|
|
RecordRelocInfo(position, last_position_);
|
|
}
|
|
last_statement_position_ = kNoPosition;
|
|
last_position_ = kNoPosition;
|
|
}
|
|
|
|
|
|
void Assembler::GrowBuffer() {
|
|
ASSERT(overflow()); // should not call this otherwise
|
|
if (!own_buffer_) FATAL("external code buffer is too small");
|
|
|
|
// compute new buffer size
|
|
CodeDesc desc; // the new buffer
|
|
if (buffer_size_ < 4*KB) {
|
|
desc.buffer_size = 4*KB;
|
|
} else {
|
|
desc.buffer_size = 2*buffer_size_;
|
|
}
|
|
// Some internal data structures overflow for very large buffers,
|
|
// they must ensure that kMaximalBufferSize is not too large.
|
|
if ((desc.buffer_size > kMaximalBufferSize) ||
|
|
(desc.buffer_size > Heap::OldGenerationSize())) {
|
|
V8::FatalProcessOutOfMemory("Assembler::GrowBuffer");
|
|
}
|
|
|
|
// setup new buffer
|
|
desc.buffer = NewArray<byte>(desc.buffer_size);
|
|
desc.instr_size = pc_offset();
|
|
desc.reloc_size = (buffer_ + buffer_size_) - (reloc_info_writer.pos());
|
|
|
|
// Clear the buffer in debug mode. Use 'int3' instructions to make
|
|
// sure to get into problems if we ever run uninitialized code.
|
|
if (kDebug) {
|
|
memset(desc.buffer, 0xCC, desc.buffer_size);
|
|
}
|
|
|
|
// copy the data
|
|
int pc_delta = desc.buffer - buffer_;
|
|
int rc_delta = (desc.buffer + desc.buffer_size) - (buffer_ + buffer_size_);
|
|
memmove(desc.buffer, buffer_, desc.instr_size);
|
|
memmove(rc_delta + reloc_info_writer.pos(),
|
|
reloc_info_writer.pos(), desc.reloc_size);
|
|
|
|
// switch buffers
|
|
if (spare_buffer_ == NULL && buffer_size_ == kMinimalBufferSize) {
|
|
spare_buffer_ = buffer_;
|
|
} else {
|
|
DeleteArray(buffer_);
|
|
}
|
|
buffer_ = desc.buffer;
|
|
buffer_size_ = desc.buffer_size;
|
|
pc_ += pc_delta;
|
|
if (last_pc_ != NULL) {
|
|
last_pc_ += pc_delta;
|
|
}
|
|
reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
|
|
reloc_info_writer.last_pc() + pc_delta);
|
|
|
|
// relocate runtime entries
|
|
for (RelocIterator it(desc); !it.done(); it.next()) {
|
|
RelocMode rmode = it.rinfo()->rmode();
|
|
if (rmode == runtime_entry) {
|
|
int32_t* p = reinterpret_cast<int32_t*>(it.rinfo()->pc());
|
|
*p -= pc_delta; // relocate entry
|
|
} else if (rmode == internal_reference) {
|
|
int32_t* p = reinterpret_cast<int32_t*>(it.rinfo()->pc());
|
|
if (*p != 0) { // 0 means uninitialized.
|
|
*p += pc_delta;
|
|
}
|
|
}
|
|
}
|
|
|
|
ASSERT(!overflow());
|
|
}
|
|
|
|
|
|
void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) {
|
|
ASSERT(is_uint8(op1) && is_uint8(op2)); // wrong opcode
|
|
ASSERT(is_uint8(imm8));
|
|
ASSERT((op1 & 0x01) == 0); // should be 8bit operation
|
|
EMIT(op1);
|
|
EMIT(op2 | dst.code());
|
|
EMIT(imm8);
|
|
}
|
|
|
|
|
|
void Assembler::emit_arith(int sel, Operand dst, const Immediate& x) {
|
|
ASSERT((0 <= sel) && (sel <= 7));
|
|
Register ireg = { sel };
|
|
if (x.is_int8()) {
|
|
EMIT(0x83); // using a sign-extended 8-bit immediate.
|
|
emit_operand(ireg, dst);
|
|
EMIT(x.x_ & 0xFF);
|
|
} else if (dst.is_reg(eax)) {
|
|
EMIT((sel << 3) | 0x05); // short form if the destination is eax.
|
|
emit(x);
|
|
} else {
|
|
EMIT(0x81); // using a literal 32-bit immediate.
|
|
emit_operand(ireg, dst);
|
|
emit(x);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::emit_operand(Register reg, const Operand& adr) {
|
|
adr.set_reg(reg);
|
|
memmove(pc_, adr.buf_, adr.len_);
|
|
pc_ += adr.len_;
|
|
if (adr.len_ >= sizeof(int32_t) && adr.rmode_ != no_reloc) {
|
|
pc_ -= sizeof(int32_t); // pc_ must be *at* disp32
|
|
RecordRelocInfo(adr.rmode_);
|
|
pc_ += sizeof(int32_t);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::emit_operand(const Operand& adr, Register reg) {
|
|
adr.set_reg(reg);
|
|
memmove(pc_, adr.buf_, adr.len_);
|
|
pc_ += adr.len_;
|
|
if (adr.len_ >= sizeof(int32_t) && adr.rmode_ != no_reloc) {
|
|
pc_ -= sizeof(int32_t); // pc_ must be *at* disp32
|
|
RecordRelocInfo(adr.rmode_);
|
|
pc_ += sizeof(int32_t);
|
|
}
|
|
}
|
|
|
|
|
|
void Assembler::emit_farith(int b1, int b2, int i) {
|
|
ASSERT(is_uint8(b1) && is_uint8(b2)); // wrong opcode
|
|
ASSERT(0 <= i && i < 8); // illegal stack offset
|
|
EMIT(b1);
|
|
EMIT(b2 + i);
|
|
}
|
|
|
|
void Assembler::dd(uint32_t data, RelocMode reloc_info) {
|
|
EnsureSpace ensure_space(this);
|
|
emit(data, reloc_info);
|
|
}
|
|
|
|
|
|
void Assembler::RecordRelocInfo(RelocMode rmode, intptr_t data) {
|
|
ASSERT(rmode != no_reloc);
|
|
// Don't record external references unless the heap will be serialized.
|
|
if (rmode == external_reference &&
|
|
!Serializer::enabled() &&
|
|
!FLAG_debug_code) {
|
|
return;
|
|
}
|
|
RelocInfo rinfo(pc_, rmode, data);
|
|
reloc_info_writer.Write(&rinfo);
|
|
}
|
|
|
|
void Assembler::WriteInternalReference(int position, Label &bound_label) {
|
|
ASSERT(bound_label.is_bound());
|
|
ASSERT(0 <= position && position + (int)sizeof(uint32_t) <= pc_offset());
|
|
ASSERT(long_at(position) == 0); // only initialize once!
|
|
|
|
uint32_t label_loc = reinterpret_cast<uint32_t>(addr_at(bound_label.pos()));
|
|
long_at_put(position, label_loc);
|
|
}
|
|
|
|
} } // namespace v8::internal
|