dc6b5109d7
Instead of loading 64 bits and shifting: ldr x0, [x1, #offset] asr x0, x0, #32 directly load the interesting 32 bits and sign-extend: ldrsw x0, [x1, #offset+4] BUG= Review-Url: https://codereview.chromium.org/2243843002 Cr-Commit-Position: refs/heads/master@{#38622} |
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instruction-selector-arm64-unittest.cc |