d07a2eb806
This way we don't clash with the ASSERT* macros defined by GoogleTest, and we are one step closer to being able to replace our homegrown base/ with base/ from Chrome. R=jochen@chromium.org, svenpanne@chromium.org Review URL: https://codereview.chromium.org/430503007 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@22812 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
234 lines
8.4 KiB
C++
234 lines
8.4 KiB
C++
// Copyright 2013 the V8 project authors. All rights reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef V8_ARM64_TEST_UTILS_ARM64_H_
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#define V8_ARM64_TEST_UTILS_ARM64_H_
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#include "src/v8.h"
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#include "test/cctest/cctest.h"
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#include "src/arm64/macro-assembler-arm64.h"
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#include "src/arm64/utils-arm64.h"
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#include "src/macro-assembler.h"
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using namespace v8::internal;
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// RegisterDump: Object allowing integer, floating point and flags registers
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// to be saved to itself for future reference.
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class RegisterDump {
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public:
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RegisterDump() : completed_(false) {}
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// The Dump method generates code to store a snapshot of the register values.
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// It needs to be able to use the stack temporarily, and requires that the
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// current stack pointer is csp, and is properly aligned.
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//
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// The dumping code is generated though the given MacroAssembler. No registers
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// are corrupted in the process, but the stack is used briefly. The flags will
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// be corrupted during this call.
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void Dump(MacroAssembler* assm);
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// Register accessors.
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inline int32_t wreg(unsigned code) const {
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if (code == kSPRegInternalCode) {
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return wspreg();
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}
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DCHECK(RegAliasesMatch(code));
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return dump_.w_[code];
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}
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inline int64_t xreg(unsigned code) const {
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if (code == kSPRegInternalCode) {
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return spreg();
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}
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DCHECK(RegAliasesMatch(code));
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return dump_.x_[code];
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}
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// FPRegister accessors.
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inline uint32_t sreg_bits(unsigned code) const {
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DCHECK(FPRegAliasesMatch(code));
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return dump_.s_[code];
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}
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inline float sreg(unsigned code) const {
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return rawbits_to_float(sreg_bits(code));
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}
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inline uint64_t dreg_bits(unsigned code) const {
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DCHECK(FPRegAliasesMatch(code));
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return dump_.d_[code];
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}
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inline double dreg(unsigned code) const {
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return rawbits_to_double(dreg_bits(code));
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}
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// Stack pointer accessors.
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inline int64_t spreg() const {
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DCHECK(SPRegAliasesMatch());
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return dump_.sp_;
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}
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inline int64_t wspreg() const {
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DCHECK(SPRegAliasesMatch());
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return dump_.wsp_;
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}
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// Flags accessors.
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inline uint64_t flags_nzcv() const {
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DCHECK(IsComplete());
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DCHECK((dump_.flags_ & ~Flags_mask) == 0);
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return dump_.flags_ & Flags_mask;
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}
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inline bool IsComplete() const {
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return completed_;
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}
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private:
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// Indicate whether the dump operation has been completed.
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bool completed_;
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// Check that the lower 32 bits of x<code> exactly match the 32 bits of
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// w<code>. A failure of this test most likely represents a failure in the
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// ::Dump method, or a failure in the simulator.
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bool RegAliasesMatch(unsigned code) const {
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DCHECK(IsComplete());
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DCHECK(code < kNumberOfRegisters);
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return ((dump_.x_[code] & kWRegMask) == dump_.w_[code]);
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}
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// As RegAliasesMatch, but for the stack pointer.
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bool SPRegAliasesMatch() const {
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DCHECK(IsComplete());
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return ((dump_.sp_ & kWRegMask) == dump_.wsp_);
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}
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// As RegAliasesMatch, but for floating-point registers.
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bool FPRegAliasesMatch(unsigned code) const {
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DCHECK(IsComplete());
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DCHECK(code < kNumberOfFPRegisters);
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return (dump_.d_[code] & kSRegMask) == dump_.s_[code];
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}
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// Store all the dumped elements in a simple struct so the implementation can
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// use offsetof to quickly find the correct field.
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struct dump_t {
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// Core registers.
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uint64_t x_[kNumberOfRegisters];
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uint32_t w_[kNumberOfRegisters];
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// Floating-point registers, as raw bits.
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uint64_t d_[kNumberOfFPRegisters];
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uint32_t s_[kNumberOfFPRegisters];
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// The stack pointer.
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uint64_t sp_;
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uint64_t wsp_;
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// NZCV flags, stored in bits 28 to 31.
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// bit[31] : Negative
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// bit[30] : Zero
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// bit[29] : Carry
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// bit[28] : oVerflow
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uint64_t flags_;
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} dump_;
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static dump_t for_sizeof();
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STATIC_ASSERT(sizeof(for_sizeof().d_[0]) == kDRegSize);
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STATIC_ASSERT(sizeof(for_sizeof().s_[0]) == kSRegSize);
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STATIC_ASSERT(sizeof(for_sizeof().d_[0]) == kXRegSize);
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STATIC_ASSERT(sizeof(for_sizeof().s_[0]) == kWRegSize);
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STATIC_ASSERT(sizeof(for_sizeof().x_[0]) == kXRegSize);
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STATIC_ASSERT(sizeof(for_sizeof().w_[0]) == kWRegSize);
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};
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// Some of these methods don't use the RegisterDump argument, but they have to
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// accept them so that they can overload those that take register arguments.
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bool Equal32(uint32_t expected, const RegisterDump*, uint32_t result);
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bool Equal64(uint64_t expected, const RegisterDump*, uint64_t result);
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bool EqualFP32(float expected, const RegisterDump*, float result);
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bool EqualFP64(double expected, const RegisterDump*, double result);
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bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg);
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bool Equal64(uint64_t expected, const RegisterDump* core, const Register& reg);
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bool EqualFP32(float expected, const RegisterDump* core,
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const FPRegister& fpreg);
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bool EqualFP64(double expected, const RegisterDump* core,
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const FPRegister& fpreg);
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bool Equal64(const Register& reg0, const RegisterDump* core,
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const Register& reg1);
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bool EqualNzcv(uint32_t expected, uint32_t result);
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bool EqualRegisters(const RegisterDump* a, const RegisterDump* b);
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// Populate the w, x and r arrays with registers from the 'allowed' mask. The
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// r array will be populated with <reg_size>-sized registers,
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//
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// This allows for tests which use large, parameterized blocks of registers
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// (such as the push and pop tests), but where certain registers must be
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// avoided as they are used for other purposes.
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//
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// Any of w, x, or r can be NULL if they are not required.
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//
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// The return value is a RegList indicating which registers were allocated.
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RegList PopulateRegisterArray(Register* w, Register* x, Register* r,
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int reg_size, int reg_count, RegList allowed);
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// As PopulateRegisterArray, but for floating-point registers.
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RegList PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v,
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int reg_size, int reg_count, RegList allowed);
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// Ovewrite the contents of the specified registers. This enables tests to
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// check that register contents are written in cases where it's likely that the
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// correct outcome could already be stored in the register.
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//
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// This always overwrites X-sized registers. If tests are operating on W
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// registers, a subsequent write into an aliased W register should clear the
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// top word anyway, so clobbering the full X registers should make tests more
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// rigorous.
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void Clobber(MacroAssembler* masm, RegList reg_list,
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uint64_t const value = 0xfedcba9876543210UL);
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// As Clobber, but for FP registers.
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void ClobberFP(MacroAssembler* masm, RegList reg_list,
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double const value = kFP64SignallingNaN);
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// As Clobber, but for a CPURegList with either FP or integer registers. When
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// using this method, the clobber value is always the default for the basic
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// Clobber or ClobberFP functions.
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void Clobber(MacroAssembler* masm, CPURegList reg_list);
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#endif // V8_ARM64_TEST_UTILS_ARM64_H_
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