AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity
644b730631
v8/infra
History
Victor Costan 644b730631 Add test coverage for x86 processors with SSE3 but not SSSE3 support. 
One of the x86 ISA extensions is confusingly named SSSE3 (*Supplemental*
Streaming SIMD Extensions 3). SSSE3 supersedes SSE3, and is superseded
by SSE4.

This CL adds testing coverage for x86 CPUs that support SSE3
instructions, but do not support SSSE3 instructions. Chrome supports
these CPUs, and they are used by a non-trivial amount of Chrome's users
on Windows. This CL aims to cover all the spots missed by
https://crrev.com/c/2757893.

Change-Id: I83fc963b977b285898ffe12304443ad67db68d1f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2764820
Auto-Submit: Victor Costan <pwnall@chromium.org>
Reviewed-by: Michael Achenbach <machenbach@chromium.org>
Commit-Queue: Michael Achenbach <machenbach@chromium.org>
Cr-Commit-Position: refs/heads/master@{#73474}
2021-03-17 14:10:34 +00:00
..
mb [MB] Add a Mac-on_arm compile only trybot 2021-02-22 15:36:34 +00:00
testing Add test coverage for x86 processors with SSE3 but not SSSE3 support. 2021-03-17 14:10:34 +00:00
OWNERS Use relative paths to OWNERS files 2019-08-12 13:52:52 +00:00
README.md /infra-config directory 2015-06-01 16:19:49 +00:00

README.md

This directory contains infra-specific files.