81877a6440
TEST=cctest,mjsunit,unittests R=dcarney@chromium.org, svenpanne@chromium.org Review URL: https://codereview.chromium.org/654833002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24595 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
604 lines
18 KiB
C++
604 lines
18 KiB
C++
// Copyright 2014 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include "test/unittests/compiler/instruction-selector-unittest.h"
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namespace v8 {
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namespace internal {
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namespace compiler {
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namespace {
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// Immediates (random subset).
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static const int32_t kImmediates[] = {
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kMinInt, -42, -1, 0, 1, 2, 3, 4, 5,
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6, 7, 8, 16, 42, 0xff, 0xffff, 0x0f0f0f0f, kMaxInt};
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} // namespace
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TEST_F(InstructionSelectorTest, Int32AddWithParameter) {
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StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
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m.Return(m.Int32Add(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
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}
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TEST_F(InstructionSelectorTest, Int32AddWithImmediate) {
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TRACED_FOREACH(int32_t, imm, kImmediates) {
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{
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StreamBuilder m(this, kMachInt32, kMachInt32);
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m.Return(m.Int32Add(m.Parameter(0), m.Int32Constant(imm)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
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ASSERT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
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}
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{
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StreamBuilder m(this, kMachInt32, kMachInt32);
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m.Return(m.Int32Add(m.Int32Constant(imm), m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
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ASSERT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
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}
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}
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}
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TEST_F(InstructionSelectorTest, Int32SubWithParameter) {
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StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
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m.Return(m.Int32Sub(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kIA32Sub, s[0]->arch_opcode());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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TEST_F(InstructionSelectorTest, Int32SubWithImmediate) {
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TRACED_FOREACH(int32_t, imm, kImmediates) {
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StreamBuilder m(this, kMachInt32, kMachInt32);
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m.Return(m.Int32Sub(m.Parameter(0), m.Int32Constant(imm)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kIA32Sub, s[0]->arch_opcode());
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ASSERT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
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}
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}
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// -----------------------------------------------------------------------------
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// Conversions.
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TEST_F(InstructionSelectorTest, ChangeFloat32ToFloat64WithParameter) {
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StreamBuilder m(this, kMachFloat32, kMachFloat64);
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m.Return(m.ChangeFloat32ToFloat64(m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kSSECvtss2sd, s[0]->arch_opcode());
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EXPECT_EQ(1U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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TEST_F(InstructionSelectorTest, TruncateFloat64ToFloat32WithParameter) {
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StreamBuilder m(this, kMachFloat64, kMachFloat32);
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m.Return(m.TruncateFloat64ToFloat32(m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kSSECvtsd2ss, s[0]->arch_opcode());
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EXPECT_EQ(1U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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// -----------------------------------------------------------------------------
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// Better left operand for commutative binops
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TEST_F(InstructionSelectorTest, BetterLeftOperandTestAddBinop) {
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StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
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Node* param1 = m.Parameter(0);
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Node* param2 = m.Parameter(1);
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Node* add = m.Int32Add(param1, param2);
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m.Return(m.Int32Add(add, param1));
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Stream s = m.Build();
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ASSERT_EQ(2U, s.size());
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EXPECT_EQ(kIA32Add, s[0]->arch_opcode());
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ASSERT_EQ(2U, s[0]->InputCount());
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ASSERT_TRUE(s[0]->InputAt(0)->IsUnallocated());
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EXPECT_EQ(s.ToVreg(param2), s.ToVreg(s[0]->InputAt(0)));
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}
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TEST_F(InstructionSelectorTest, BetterLeftOperandTestMulBinop) {
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StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
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Node* param1 = m.Parameter(0);
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Node* param2 = m.Parameter(1);
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Node* mul = m.Int32Mul(param1, param2);
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m.Return(m.Int32Mul(mul, param1));
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Stream s = m.Build();
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ASSERT_EQ(2U, s.size());
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EXPECT_EQ(kIA32Imul, s[0]->arch_opcode());
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ASSERT_EQ(2U, s[0]->InputCount());
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ASSERT_TRUE(s[0]->InputAt(0)->IsUnallocated());
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EXPECT_EQ(s.ToVreg(param2), s.ToVreg(s[0]->InputAt(0)));
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}
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// -----------------------------------------------------------------------------
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// Conversions.
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TEST_F(InstructionSelectorTest, ChangeUint32ToFloat64WithParameter) {
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StreamBuilder m(this, kMachFloat64, kMachUint32);
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m.Return(m.ChangeUint32ToFloat64(m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kSSEUint32ToFloat64, s[0]->arch_opcode());
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}
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// -----------------------------------------------------------------------------
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// Loads and stores
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namespace {
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struct MemoryAccess {
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MachineType type;
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ArchOpcode load_opcode;
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ArchOpcode store_opcode;
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};
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std::ostream& operator<<(std::ostream& os, const MemoryAccess& memacc) {
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return os << memacc.type;
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}
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static const MemoryAccess kMemoryAccesses[] = {
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{kMachInt8, kIA32Movsxbl, kIA32Movb},
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{kMachUint8, kIA32Movzxbl, kIA32Movb},
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{kMachInt16, kIA32Movsxwl, kIA32Movw},
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{kMachUint16, kIA32Movzxwl, kIA32Movw},
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{kMachInt32, kIA32Movl, kIA32Movl},
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{kMachUint32, kIA32Movl, kIA32Movl},
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{kMachFloat32, kIA32Movss, kIA32Movss},
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{kMachFloat64, kIA32Movsd, kIA32Movsd}};
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} // namespace
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typedef InstructionSelectorTestWithParam<MemoryAccess>
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InstructionSelectorMemoryAccessTest;
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TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
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const MemoryAccess memacc = GetParam();
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StreamBuilder m(this, memacc.type, kMachPtr, kMachInt32);
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m.Return(m.Load(memacc.type, m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateBase) {
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const MemoryAccess memacc = GetParam();
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TRACED_FOREACH(int32_t, base, kImmediates) {
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StreamBuilder m(this, memacc.type, kMachPtr);
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m.Return(m.Load(memacc.type, m.Int32Constant(base), m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
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if (base == 0) {
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ASSERT_EQ(1U, s[0]->InputCount());
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} else {
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ASSERT_EQ(2U, s[0]->InputCount());
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ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
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EXPECT_EQ(base, s.ToInt32(s[0]->InputAt(1)));
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}
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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}
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TEST_P(InstructionSelectorMemoryAccessTest, LoadWithImmediateIndex) {
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const MemoryAccess memacc = GetParam();
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TRACED_FOREACH(int32_t, index, kImmediates) {
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StreamBuilder m(this, memacc.type, kMachPtr);
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m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
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if (index == 0) {
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ASSERT_EQ(1U, s[0]->InputCount());
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} else {
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ASSERT_EQ(2U, s[0]->InputCount());
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ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
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EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
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}
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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}
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TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
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const MemoryAccess memacc = GetParam();
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StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
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m.Store(memacc.type, m.Parameter(0), m.Parameter(1), m.Parameter(2));
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m.Return(m.Int32Constant(0));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
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EXPECT_EQ(3U, s[0]->InputCount());
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EXPECT_EQ(0U, s[0]->OutputCount());
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}
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TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateBase) {
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const MemoryAccess memacc = GetParam();
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TRACED_FOREACH(int32_t, base, kImmediates) {
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StreamBuilder m(this, kMachInt32, kMachInt32, memacc.type);
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m.Store(memacc.type, m.Int32Constant(base), m.Parameter(0), m.Parameter(1));
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m.Return(m.Int32Constant(0));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
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if (base == 0) {
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ASSERT_EQ(2U, s[0]->InputCount());
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} else {
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ASSERT_EQ(3U, s[0]->InputCount());
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ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
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EXPECT_EQ(base, s.ToInt32(s[0]->InputAt(1)));
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}
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EXPECT_EQ(0U, s[0]->OutputCount());
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}
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}
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TEST_P(InstructionSelectorMemoryAccessTest, StoreWithImmediateIndex) {
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const MemoryAccess memacc = GetParam();
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TRACED_FOREACH(int32_t, index, kImmediates) {
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StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
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m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index),
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m.Parameter(1));
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m.Return(m.Int32Constant(0));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
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if (index == 0) {
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ASSERT_EQ(2U, s[0]->InputCount());
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} else {
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ASSERT_EQ(3U, s[0]->InputCount());
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ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
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EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
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}
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EXPECT_EQ(0U, s[0]->OutputCount());
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}
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
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InstructionSelectorMemoryAccessTest,
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::testing::ValuesIn(kMemoryAccesses));
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// -----------------------------------------------------------------------------
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// AddressingMode for loads and stores.
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class AddressingModeUnitTest : public InstructionSelectorTest {
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public:
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AddressingModeUnitTest() : m(NULL) { Reset(); }
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~AddressingModeUnitTest() { delete m; }
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void Run(Node* base, Node* index, AddressingMode mode) {
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Node* load = m->Load(kMachInt32, base, index);
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m->Store(kMachInt32, base, index, load);
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m->Return(m->Int32Constant(0));
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Stream s = m->Build();
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ASSERT_EQ(2U, s.size());
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EXPECT_EQ(mode, s[0]->addressing_mode());
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EXPECT_EQ(mode, s[1]->addressing_mode());
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}
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Node* zero;
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Node* null_ptr;
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Node* non_zero;
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Node* base_reg; // opaque value to generate base as register
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Node* index_reg; // opaque value to generate index as register
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Node* scales[4];
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StreamBuilder* m;
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void Reset() {
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delete m;
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m = new StreamBuilder(this, kMachInt32, kMachInt32, kMachInt32);
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zero = m->Int32Constant(0);
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null_ptr = m->Int32Constant(0);
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non_zero = m->Int32Constant(127);
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base_reg = m->Parameter(0);
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index_reg = m->Parameter(0);
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scales[0] = m->Int32Constant(1);
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scales[1] = m->Int32Constant(2);
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scales[2] = m->Int32Constant(4);
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scales[3] = m->Int32Constant(8);
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}
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};
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TEST_F(AddressingModeUnitTest, AddressingMode_MR) {
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Node* base = base_reg;
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Node* index = zero;
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Run(base, index, kMode_MR);
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MRI) {
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Node* base = base_reg;
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Node* index = non_zero;
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Run(base, index, kMode_MRI);
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MR1) {
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Node* base = base_reg;
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Node* index = index_reg;
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Run(base, index, kMode_MR1);
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MRN) {
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AddressingMode expected[] = {kMode_MR1, kMode_MR2, kMode_MR4, kMode_MR8};
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for (size_t i = 0; i < arraysize(scales); ++i) {
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Reset();
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Node* base = base_reg;
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Node* index = m->Int32Mul(index_reg, scales[i]);
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Run(base, index, expected[i]);
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}
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MR1I) {
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Node* base = base_reg;
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Node* index = m->Int32Add(index_reg, non_zero);
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Run(base, index, kMode_MR1I);
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MRNI) {
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AddressingMode expected[] = {kMode_MR1I, kMode_MR2I, kMode_MR4I, kMode_MR8I};
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for (size_t i = 0; i < arraysize(scales); ++i) {
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Reset();
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Node* base = base_reg;
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Node* index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
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Run(base, index, expected[i]);
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}
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_M1) {
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Node* base = null_ptr;
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Node* index = index_reg;
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Run(base, index, kMode_M1);
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MN) {
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AddressingMode expected[] = {kMode_M1, kMode_M2, kMode_M4, kMode_M8};
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for (size_t i = 0; i < arraysize(scales); ++i) {
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Reset();
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Node* base = null_ptr;
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Node* index = m->Int32Mul(index_reg, scales[i]);
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Run(base, index, expected[i]);
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}
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_M1I) {
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Node* base = null_ptr;
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Node* index = m->Int32Add(index_reg, non_zero);
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Run(base, index, kMode_M1I);
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MNI) {
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AddressingMode expected[] = {kMode_M1I, kMode_M2I, kMode_M4I, kMode_M8I};
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for (size_t i = 0; i < arraysize(scales); ++i) {
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Reset();
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Node* base = null_ptr;
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Node* index = m->Int32Add(m->Int32Mul(index_reg, scales[i]), non_zero);
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Run(base, index, expected[i]);
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}
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}
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TEST_F(AddressingModeUnitTest, AddressingMode_MI) {
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Node* bases[] = {null_ptr, non_zero};
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Node* indices[] = {zero, non_zero};
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for (size_t i = 0; i < arraysize(bases); ++i) {
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for (size_t j = 0; j < arraysize(indices); ++j) {
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Reset();
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Node* base = bases[i];
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Node* index = indices[j];
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Run(base, index, kMode_MI);
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}
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}
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}
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// -----------------------------------------------------------------------------
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// Multiplication.
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namespace {
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struct MultParam {
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int value;
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bool lea_expected;
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AddressingMode addressing_mode;
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};
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std::ostream& operator<<(std::ostream& os, const MultParam& m) {
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return os << m.value << "." << m.lea_expected << "." << m.addressing_mode;
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}
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const MultParam kMultParams[] = {{-1, false, kMode_None},
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{0, false, kMode_None},
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{1, true, kMode_M1},
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{2, true, kMode_M2},
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{3, true, kMode_MR2},
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{4, true, kMode_M4},
|
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{5, true, kMode_MR4},
|
|
{6, false, kMode_None},
|
|
{7, false, kMode_None},
|
|
{8, true, kMode_M8},
|
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{9, true, kMode_MR8},
|
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{10, false, kMode_None},
|
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{11, false, kMode_None}};
|
|
|
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} // namespace
|
|
|
|
|
|
typedef InstructionSelectorTestWithParam<MultParam> InstructionSelectorMultTest;
|
|
|
|
|
|
static unsigned InputCountForLea(AddressingMode mode) {
|
|
switch (mode) {
|
|
case kMode_MR1I:
|
|
case kMode_MR2I:
|
|
case kMode_MR4I:
|
|
case kMode_MR8I:
|
|
return 3U;
|
|
case kMode_M1I:
|
|
case kMode_M2I:
|
|
case kMode_M4I:
|
|
case kMode_M8I:
|
|
return 2U;
|
|
case kMode_MR1:
|
|
case kMode_MR2:
|
|
case kMode_MR4:
|
|
case kMode_MR8:
|
|
return 2U;
|
|
case kMode_M1:
|
|
case kMode_M2:
|
|
case kMode_M4:
|
|
case kMode_M8:
|
|
return 1U;
|
|
default:
|
|
UNREACHABLE();
|
|
return 0U;
|
|
}
|
|
}
|
|
|
|
|
|
static AddressingMode AddressingModeForAddMult(const MultParam& m) {
|
|
switch (m.addressing_mode) {
|
|
case kMode_MR1:
|
|
return kMode_MR1I;
|
|
case kMode_MR2:
|
|
return kMode_MR2I;
|
|
case kMode_MR4:
|
|
return kMode_MR4I;
|
|
case kMode_MR8:
|
|
return kMode_MR8I;
|
|
case kMode_M1:
|
|
return kMode_M1I;
|
|
case kMode_M2:
|
|
return kMode_M2I;
|
|
case kMode_M4:
|
|
return kMode_M4I;
|
|
case kMode_M8:
|
|
return kMode_M8I;
|
|
default:
|
|
UNREACHABLE();
|
|
return kMode_None;
|
|
}
|
|
}
|
|
|
|
|
|
TEST_P(InstructionSelectorMultTest, Mult32) {
|
|
const MultParam m_param = GetParam();
|
|
StreamBuilder m(this, kMachInt32, kMachInt32);
|
|
Node* param = m.Parameter(0);
|
|
Node* mult = m.Int32Mul(param, m.Int32Constant(m_param.value));
|
|
m.Return(mult);
|
|
Stream s = m.Build();
|
|
ASSERT_EQ(1U, s.size());
|
|
EXPECT_EQ(m_param.addressing_mode, s[0]->addressing_mode());
|
|
if (m_param.lea_expected) {
|
|
EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
|
|
ASSERT_EQ(InputCountForLea(s[0]->addressing_mode()), s[0]->InputCount());
|
|
} else {
|
|
EXPECT_EQ(kIA32Imul, s[0]->arch_opcode());
|
|
ASSERT_EQ(2U, s[0]->InputCount());
|
|
}
|
|
EXPECT_EQ(s.ToVreg(param), s.ToVreg(s[0]->InputAt(0)));
|
|
}
|
|
|
|
|
|
TEST_P(InstructionSelectorMultTest, MultAdd32) {
|
|
TRACED_FOREACH(int32_t, imm, kImmediates) {
|
|
const MultParam m_param = GetParam();
|
|
StreamBuilder m(this, kMachInt32, kMachInt32);
|
|
Node* param = m.Parameter(0);
|
|
Node* mult = m.Int32Add(m.Int32Mul(param, m.Int32Constant(m_param.value)),
|
|
m.Int32Constant(imm));
|
|
m.Return(mult);
|
|
Stream s = m.Build();
|
|
if (m_param.lea_expected) {
|
|
ASSERT_EQ(1U, s.size());
|
|
EXPECT_EQ(kIA32Lea, s[0]->arch_opcode());
|
|
EXPECT_EQ(AddressingModeForAddMult(m_param), s[0]->addressing_mode());
|
|
unsigned input_count = InputCountForLea(s[0]->addressing_mode());
|
|
ASSERT_EQ(input_count, s[0]->InputCount());
|
|
ASSERT_EQ(InstructionOperand::IMMEDIATE,
|
|
s[0]->InputAt(input_count - 1)->kind());
|
|
EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(input_count - 1)));
|
|
} else {
|
|
ASSERT_EQ(2U, s.size());
|
|
EXPECT_EQ(kIA32Imul, s[0]->arch_opcode());
|
|
EXPECT_EQ(kIA32Add, s[1]->arch_opcode());
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorMultTest,
|
|
::testing::ValuesIn(kMultParams));
|
|
|
|
|
|
TEST_F(InstructionSelectorTest, Int32MulHigh) {
|
|
StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
|
|
Node* const p0 = m.Parameter(0);
|
|
Node* const p1 = m.Parameter(1);
|
|
Node* const n = m.Int32MulHigh(p0, p1);
|
|
m.Return(n);
|
|
Stream s = m.Build();
|
|
ASSERT_EQ(1U, s.size());
|
|
EXPECT_EQ(kIA32ImulHigh, s[0]->arch_opcode());
|
|
ASSERT_EQ(2U, s[0]->InputCount());
|
|
EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
|
|
EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
|
|
ASSERT_EQ(1U, s[0]->OutputCount());
|
|
EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
|
|
}
|
|
|
|
} // namespace compiler
|
|
} // namespace internal
|
|
} // namespace v8
|