5202facf9e
BUG= Review URL: https://codereview.chromium.org/1271703002 Cr-Commit-Position: refs/heads/master@{#30050}
245 lines
8.6 KiB
C++
245 lines
8.6 KiB
C++
// Copyright 2014 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#ifndef V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_
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#define V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_
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#include "src/compiler/instruction.h"
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#include "test/unittests/test-utils.h"
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#include "testing/gmock/include/gmock/gmock.h"
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namespace v8 {
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namespace internal {
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namespace compiler {
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class InstructionSequenceTest : public TestWithIsolateAndZone {
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public:
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static const int kDefaultNRegs = 4;
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static const int kNoValue = kMinInt;
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typedef RpoNumber Rpo;
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struct VReg {
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VReg() : value_(kNoValue) {}
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VReg(PhiInstruction* phi) : value_(phi->virtual_register()) {} // NOLINT
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explicit VReg(int value) : value_(value) {}
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int value_;
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};
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typedef std::pair<VReg, VReg> VRegPair;
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enum TestOperandType {
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kInvalid,
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kSameAsFirst,
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kRegister,
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kFixedRegister,
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kSlot,
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kFixedSlot,
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kImmediate,
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kNone,
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kConstant,
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kUnique,
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kUniqueRegister
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};
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struct TestOperand {
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TestOperand() : type_(kInvalid), vreg_(), value_(kNoValue) {}
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TestOperand(TestOperandType type, int imm)
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: type_(type), vreg_(), value_(imm) {}
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TestOperand(TestOperandType type, VReg vreg, int value = kNoValue)
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: type_(type), vreg_(vreg), value_(value) {}
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TestOperandType type_;
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VReg vreg_;
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int value_;
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};
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static TestOperand Same() { return TestOperand(kSameAsFirst, VReg()); }
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static TestOperand Reg(VReg vreg, int index = kNoValue) {
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TestOperandType type = kRegister;
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if (index != kNoValue) type = kFixedRegister;
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return TestOperand(type, vreg, index);
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}
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static TestOperand Reg(int index = kNoValue) { return Reg(VReg(), index); }
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static TestOperand Slot(VReg vreg, int index = kNoValue) {
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TestOperandType type = kSlot;
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if (index != kNoValue) type = kFixedSlot;
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return TestOperand(type, vreg, index);
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}
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static TestOperand Slot(int index = kNoValue) { return Slot(VReg(), index); }
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static TestOperand Const(int index) {
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CHECK_NE(kNoValue, index);
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return TestOperand(kConstant, VReg(), index);
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}
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static TestOperand Use(VReg vreg) { return TestOperand(kNone, vreg); }
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static TestOperand Use() { return Use(VReg()); }
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static TestOperand Unique(VReg vreg) { return TestOperand(kUnique, vreg); }
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static TestOperand UniqueReg(VReg vreg) {
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return TestOperand(kUniqueRegister, vreg);
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}
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enum BlockCompletionType { kBlockEnd, kFallThrough, kBranch, kJump };
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struct BlockCompletion {
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BlockCompletionType type_;
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TestOperand op_;
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int offset_0_;
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int offset_1_;
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};
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static BlockCompletion FallThrough() {
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BlockCompletion completion = {kFallThrough, TestOperand(), 1, kNoValue};
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return completion;
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}
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static BlockCompletion Jump(int offset) {
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BlockCompletion completion = {kJump, TestOperand(), offset, kNoValue};
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return completion;
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}
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static BlockCompletion Branch(TestOperand op, int left_offset,
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int right_offset) {
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BlockCompletion completion = {kBranch, op, left_offset, right_offset};
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return completion;
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}
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static BlockCompletion Last() {
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BlockCompletion completion = {kBlockEnd, TestOperand(), kNoValue, kNoValue};
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return completion;
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}
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InstructionSequenceTest();
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void SetNumRegs(int num_general_registers, int num_double_registers);
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RegisterConfiguration* config();
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InstructionSequence* sequence();
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void StartLoop(int loop_blocks);
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void EndLoop();
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void StartBlock(bool deferred = false);
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Instruction* EndBlock(BlockCompletion completion = FallThrough());
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TestOperand Imm(int32_t imm = 0);
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VReg Define(TestOperand output_op);
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VReg Parameter(TestOperand output_op = Reg()) { return Define(output_op); }
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Instruction* Return(TestOperand input_op_0);
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Instruction* Return(VReg vreg) { return Return(Reg(vreg, 0)); }
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PhiInstruction* Phi(VReg incoming_vreg_0 = VReg(),
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VReg incoming_vreg_1 = VReg(),
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VReg incoming_vreg_2 = VReg(),
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VReg incoming_vreg_3 = VReg());
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PhiInstruction* Phi(VReg incoming_vreg_0, size_t input_count);
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void SetInput(PhiInstruction* phi, size_t input, VReg vreg);
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VReg DefineConstant(int32_t imm = 0);
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Instruction* EmitNop();
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Instruction* EmitI(size_t input_size, TestOperand* inputs);
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Instruction* EmitI(TestOperand input_op_0 = TestOperand(),
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TestOperand input_op_1 = TestOperand(),
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TestOperand input_op_2 = TestOperand(),
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TestOperand input_op_3 = TestOperand());
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VReg EmitOI(TestOperand output_op, size_t input_size, TestOperand* inputs);
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VReg EmitOI(TestOperand output_op, TestOperand input_op_0 = TestOperand(),
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TestOperand input_op_1 = TestOperand(),
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TestOperand input_op_2 = TestOperand(),
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TestOperand input_op_3 = TestOperand());
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VRegPair EmitOOI(TestOperand output_op_0, TestOperand output_op_1,
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size_t input_size, TestOperand* inputs);
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VRegPair EmitOOI(TestOperand output_op_0, TestOperand output_op_1,
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TestOperand input_op_0 = TestOperand(),
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TestOperand input_op_1 = TestOperand(),
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TestOperand input_op_2 = TestOperand(),
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TestOperand input_op_3 = TestOperand());
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VReg EmitCall(TestOperand output_op, size_t input_size, TestOperand* inputs);
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VReg EmitCall(TestOperand output_op, TestOperand input_op_0 = TestOperand(),
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TestOperand input_op_1 = TestOperand(),
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TestOperand input_op_2 = TestOperand(),
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TestOperand input_op_3 = TestOperand());
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InstructionBlock* current_block() const { return current_block_; }
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int num_general_registers() const { return num_general_registers_; }
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int num_double_registers() const { return num_double_registers_; }
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// Called after all instructions have been inserted.
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void WireBlocks();
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private:
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VReg NewReg() { return VReg(sequence()->NextVirtualRegister()); }
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static TestOperand Invalid() { return TestOperand(kInvalid, VReg()); }
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Instruction* EmitBranch(TestOperand input_op);
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Instruction* EmitFallThrough();
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Instruction* EmitJump();
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Instruction* NewInstruction(InstructionCode code, size_t outputs_size,
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InstructionOperand* outputs,
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size_t inputs_size = 0,
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InstructionOperand* inputs = nullptr,
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size_t temps_size = 0,
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InstructionOperand* temps = nullptr);
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InstructionOperand Unallocated(TestOperand op,
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UnallocatedOperand::ExtendedPolicy policy);
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InstructionOperand Unallocated(TestOperand op,
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UnallocatedOperand::ExtendedPolicy policy,
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UnallocatedOperand::Lifetime lifetime);
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InstructionOperand Unallocated(TestOperand op,
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UnallocatedOperand::ExtendedPolicy policy,
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int index);
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InstructionOperand Unallocated(TestOperand op,
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UnallocatedOperand::BasicPolicy policy,
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int index);
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InstructionOperand* ConvertInputs(size_t input_size, TestOperand* inputs);
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InstructionOperand ConvertInputOp(TestOperand op);
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InstructionOperand ConvertOutputOp(VReg vreg, TestOperand op);
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InstructionBlock* NewBlock(bool deferred = false);
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void WireBlock(size_t block_offset, int jump_offset);
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Instruction* Emit(InstructionCode code, size_t outputs_size = 0,
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InstructionOperand* outputs = nullptr,
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size_t inputs_size = 0,
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InstructionOperand* inputs = nullptr, size_t temps_size = 0,
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InstructionOperand* temps = nullptr, bool is_call = false);
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Instruction* AddInstruction(Instruction* instruction);
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struct LoopData {
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Rpo loop_header_;
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int expected_blocks_;
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};
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typedef std::vector<LoopData> LoopBlocks;
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typedef std::map<int, const Instruction*> Instructions;
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typedef std::vector<BlockCompletion> Completions;
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base::SmartPointer<RegisterConfiguration> config_;
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InstructionSequence* sequence_;
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int num_general_registers_;
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int num_double_registers_;
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// Block building state.
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InstructionBlocks instruction_blocks_;
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Instructions instructions_;
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Completions completions_;
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LoopBlocks loop_blocks_;
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InstructionBlock* current_block_;
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bool block_returns_;
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};
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} // namespace compiler
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} // namespace internal
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} // namespace v8
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#endif // V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_
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