Ng Zhi An 9996d8aec9 [x64] Consolidate SSE/AVX Float32/Float64 Abs/Neg ... 1. Move Abspd, Negpd from MacroAssembler into TurboAssembler so that we can use it in code-generator 2. Add Absps and Negps (float32 versions of the instructions in 1) 3. Refactor SSE/AVX float32/float64 abs/neg to use these macro-assembler helpers. 4. Use these helpers in Liftoff too This has the benefit of not requiring to set up the masks in a temporary register, and loading the constants via an ExternalReference instead. It does require (in ins-sel) to have the input be in a Register, since the ExternalReference is an operand (and the instruction can only have 1 operand input). Bug: v8:11589 Change-Id: I68fafaf31b19ab05ee391aa3d54c45d547a85b34 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3123635 Reviewed-by: Adam Klein <adamk@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/main@{#76520}		2021-08-27 00:58:51 +00:00
..
instruction-selector-x64-unittest.cc	[x64] Consolidate SSE/AVX Float32/Float64 Abs/Neg	2021-08-27 00:58:51 +00:00