a8cdda9947
WebAssembly locals are specified to be zero on function entry. Liftoff
implements this by just storing the constant 0 in the virtual stack for
integer types, and using one floating point register initialized to
zero for all floating point types.
For big counts of locals this leads to problems (manifesting as huge
blocks of code being generated) once we hit a merge point: All those
constants (for int) and all duplicate register uses (for floats) need to
be fixed up, by using separate registers for the locals or spilling to
the stack if no more registers are available. All this spilling
generates a lot of code, and can even happen multiple times within a
function.
This CL optimizes for such cases by spilling all locals to the stack
initially. All merges within the function body get much smaller then.
The spilled values rarely have to be loaded anyway, because the initial
zero value is usually overwritten before the first use.
To optimize the code size for initializing big numbers of locals on the
stack, this CL also introduces the platform-specific
{FillStackSlotsWithZero} method which uses a loop for bigger local
counts.
This often saves dozens of kilobytes for very big functions, and shows
an overall code size reduction of 4-5 percent for big modules.
R=jkummerow@chromium.org
Bug: v8:9830
Change-Id: I23fa4145847827420f09e043a11e0e7b606e94cc
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1856004
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64282}
1005 lines
33 KiB
C++
1005 lines
33 KiB
C++
// Copyright 2011 the V8 project authors. All rights reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include <stdlib.h>
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#include "src/init/v8.h"
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#include "src/codegen/code-factory.h"
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#include "src/codegen/macro-assembler.h"
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#include "src/debug/debug.h"
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#include "src/diagnostics/disasm.h"
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#include "src/diagnostics/disassembler.h"
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#include "src/execution/frames-inl.h"
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#include "src/utils/ostreams.h"
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#include "src/objects/objects-inl.h"
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#include "test/cctest/cctest.h"
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namespace v8 {
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namespace internal {
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#define __ assm.
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TEST(DisasmX64) {
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CcTest::InitializeVM();
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Isolate* isolate = CcTest::i_isolate();
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HandleScope scope(isolate);
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v8::internal::byte buffer[8192];
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Assembler assm(AssemblerOptions{},
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ExternalAssemblerBuffer(buffer, sizeof buffer));
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// Short immediate instructions
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__ addq(rax, Immediate(12345678));
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__ orq(rax, Immediate(12345678));
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__ subq(rax, Immediate(12345678));
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__ xorq(rax, Immediate(12345678));
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__ andq(rax, Immediate(12345678));
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// ---- This one caused crash
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__ movq(rbx, Operand(rsp, rcx, times_2, 0)); // [rsp+rcx*4]
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// ---- All instructions that I can think of
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__ addq(rdx, rbx);
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__ addq(rdx, Operand(rbx, 0));
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__ addq(rdx, Operand(rbx, 16));
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__ addq(rdx, Operand(rbx, 1999));
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__ addq(rdx, Operand(rbx, -4));
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__ addq(rdx, Operand(rbx, -1999));
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__ addq(rdx, Operand(rsp, 0));
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__ addq(rdx, Operand(rsp, 16));
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__ addq(rdx, Operand(rsp, 1999));
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__ addq(rdx, Operand(rsp, -4));
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__ addq(rdx, Operand(rsp, -1999));
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__ nop();
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__ addq(rsi, Operand(rcx, times_4, 0));
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__ addq(rsi, Operand(rcx, times_4, 24));
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__ addq(rsi, Operand(rcx, times_4, -4));
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__ addq(rsi, Operand(rcx, times_4, -1999));
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__ nop();
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__ addq(rdi, Operand(rbp, rcx, times_4, 0));
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__ addq(rdi, Operand(rbp, rcx, times_4, 12));
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__ addq(rdi, Operand(rbp, rcx, times_4, -8));
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__ addq(rdi, Operand(rbp, rcx, times_4, -3999));
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__ addq(Operand(rbp, rcx, times_4, 12), Immediate(12));
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__ bswapl(rax);
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__ bswapq(rdi);
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__ bsrl(rax, r15);
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__ bsrl(r9, Operand(rcx, times_8, 91919));
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__ nop();
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__ addq(rbx, Immediate(12));
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__ nop();
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__ nop();
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__ andq(rdx, Immediate(3));
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__ andq(rdx, Operand(rsp, 4));
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__ cmpq(rdx, Immediate(3));
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__ cmpq(rdx, Operand(rsp, 4));
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__ cmpq(Operand(rbp, rcx, times_4, 0), Immediate(1000));
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__ cmpb(rbx, Operand(rbp, rcx, times_2, 0));
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__ cmpb(Operand(rbp, rcx, times_2, 0), rbx);
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__ orq(rdx, Immediate(3));
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__ xorq(rdx, Immediate(3));
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__ nop();
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__ cpuid();
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__ movsxbl(rdx, Operand(rcx, 0));
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__ movsxbq(rdx, Operand(rcx, 0));
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__ movsxwl(rdx, Operand(rcx, 0));
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__ movsxwq(rdx, Operand(rcx, 0));
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__ movzxbl(rdx, Operand(rcx, 0));
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__ movzxwl(rdx, Operand(rcx, 0));
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__ movzxbq(rdx, Operand(rcx, 0));
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__ movzxwq(rdx, Operand(rcx, 0));
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__ nop();
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__ imulq(rdx, rcx);
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__ shld(rdx, rcx);
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__ shrd(rdx, rcx);
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__ shlq(Operand(rdi, rax, times_4, 100), Immediate(1));
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__ shlq(Operand(rdi, rax, times_4, 100), Immediate(6));
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__ shlq(Operand(r15, 0), Immediate(1));
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__ shlq(Operand(r15, 0), Immediate(6));
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__ shlq_cl(Operand(r15, 0));
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__ shlq_cl(Operand(r15, 0));
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__ shlq_cl(Operand(rdi, rax, times_4, 100));
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__ shlq_cl(Operand(rdi, rax, times_4, 100));
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__ shlq(rdx, Immediate(1));
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__ shlq(rdx, Immediate(6));
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__ shll(Operand(rdi, rax, times_4, 100), Immediate(1));
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__ shll(Operand(rdi, rax, times_4, 100), Immediate(6));
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__ shll(Operand(r15, 0), Immediate(1));
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__ shll(Operand(r15, 0), Immediate(6));
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__ shll_cl(Operand(r15, 0));
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__ shll_cl(Operand(r15, 0));
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__ shll_cl(Operand(rdi, rax, times_4, 100));
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__ shll_cl(Operand(rdi, rax, times_4, 100));
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__ shll(rdx, Immediate(1));
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__ shll(rdx, Immediate(6));
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__ btq(Operand(rdx, 0), rcx);
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__ btsq(Operand(rdx, 0), rcx);
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__ btsq(Operand(rbx, rcx, times_4, 0), rcx);
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__ btsq(rcx, Immediate(13));
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__ btrq(rcx, Immediate(13));
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__ nop();
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__ pushq(Immediate(12));
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__ pushq(Immediate(23456));
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__ pushq(rcx);
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__ pushq(rsi);
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__ pushq(Operand(rbp, JavaScriptFrameConstants::kFunctionOffset));
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__ pushq(Operand(rbx, rcx, times_4, 0));
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__ pushq(Operand(rbx, rcx, times_4, 0));
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__ pushq(Operand(rbx, rcx, times_4, 10000));
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__ popq(rdx);
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__ popq(rax);
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__ popq(Operand(rbx, rcx, times_4, 0));
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__ nop();
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__ addq(rdx, Operand(rsp, 16));
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__ addq(rdx, rcx);
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__ movb(rdx, Operand(rcx, 0));
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__ movb(rcx, Immediate(6));
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__ movb(Operand(rsp, 16), rdx);
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__ movw(Operand(rsp, 16), rdx);
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__ nop();
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__ movsxwq(rdx, Operand(rsp, 12));
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__ movsxbq(rdx, Operand(rsp, 12));
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__ movsxlq(rdx, Operand(rsp, 12));
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__ movzxwq(rdx, Operand(rsp, 12));
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__ movzxbq(rdx, Operand(rsp, 12));
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__ nop();
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__ movq(rdx, Immediate(1234567));
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__ movq(rdx, Operand(rsp, 12));
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__ movq(Operand(rbx, rcx, times_4, 10000), Immediate(12345));
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__ movq(Operand(rbx, rcx, times_4, 10000), rdx);
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__ nop();
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__ decb(rdx);
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__ decb(Operand(rax, 10));
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__ decb(Operand(rbx, rcx, times_4, 10000));
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__ decq(rdx);
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__ cdq();
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__ repstosq();
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__ nop();
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__ idivq(rdx);
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__ mull(rdx);
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__ mulq(rdx);
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__ negq(rdx);
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__ notq(rdx);
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__ testq(Operand(rbx, rcx, times_4, 10000), rdx);
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__ imulq(rdx, rcx, Immediate(12));
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__ imulq(rdx, rcx, Immediate(1000));
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__ imulq(rdx, Operand(rbx, rcx, times_4, 10000));
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__ imulq(rdx, Operand(rbx, rcx, times_4, 10000), Immediate(12));
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__ imulq(rdx, Operand(rbx, rcx, times_4, 10000), Immediate(1000));
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__ imull(r15, rcx, Immediate(12));
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__ imull(r15, rcx, Immediate(1000));
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__ imull(r15, Operand(rbx, rcx, times_4, 10000));
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__ imull(r15, Operand(rbx, rcx, times_4, 10000), Immediate(12));
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__ imull(r15, Operand(rbx, rcx, times_4, 10000), Immediate(1000));
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__ incq(rdx);
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__ incq(Operand(rbx, rcx, times_4, 10000));
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__ pushq(Operand(rbx, rcx, times_4, 10000));
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__ popq(Operand(rbx, rcx, times_4, 10000));
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__ jmp(Operand(rbx, rcx, times_4, 10000));
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__ leaq(rdx, Operand(rbx, rcx, times_4, 10000));
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__ orq(rdx, Immediate(12345));
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__ orq(rdx, Operand(rbx, rcx, times_4, 10000));
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__ nop();
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__ rclq(rdx, Immediate(1));
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__ rclq(rdx, Immediate(7));
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__ rcrq(rdx, Immediate(1));
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__ rcrq(rdx, Immediate(7));
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__ sarq(rdx, Immediate(1));
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__ sarq(rdx, Immediate(6));
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__ sarq_cl(rdx);
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__ sbbq(rdx, rbx);
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__ shld(rdx, rbx);
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__ shlq(rdx, Immediate(1));
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__ shlq(rdx, Immediate(6));
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__ shlq_cl(rdx);
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__ shrd(rdx, rbx);
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__ shrq(rdx, Immediate(1));
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__ shrq(rdx, Immediate(7));
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__ shrq_cl(rdx);
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// Immediates
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__ addq(rbx, Immediate(12));
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__ addq(Operand(rdx, rcx, times_4, 10000), Immediate(12));
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__ andq(rbx, Immediate(12345));
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__ cmpq(rbx, Immediate(12345));
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__ cmpq(rbx, Immediate(12));
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__ cmpq(Operand(rdx, rcx, times_4, 10000), Immediate(12));
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__ cmpb(rax, Immediate(100));
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__ orq(rbx, Immediate(12345));
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__ subq(rbx, Immediate(12));
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__ subq(Operand(rdx, rcx, times_4, 10000), Immediate(12));
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__ xorq(rbx, Immediate(12345));
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__ imulq(rdx, rcx, Immediate(12));
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__ imulq(rdx, rcx, Immediate(1000));
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__ cld();
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__ subq(rdx, Operand(rbx, rcx, times_4, 10000));
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__ subq(rdx, rbx);
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__ testq(rdx, Immediate(12345));
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__ testq(Operand(rbx, rcx, times_8, 10000), rdx);
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__ testb(Operand(rcx, rbx, times_2, 1000), rdx);
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__ testb(Operand(rax, -20), Immediate(0x9A));
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__ nop();
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__ xorq(rdx, Immediate(12345));
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__ xorq(rdx, Operand(rbx, rcx, times_8, 10000));
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__ pshufw(xmm5, xmm1, 3);
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__ hlt();
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__ int3();
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__ ret(0);
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__ ret(8);
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// Calls
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Label L1, L2;
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__ bind(&L1);
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__ nop();
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__ call(&L1);
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__ call(&L2);
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__ nop();
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__ bind(&L2);
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// TODO(mstarzinger): The following is protected.
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// __ call(Operand(rbx, rcx, times_4, 10000));
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__ nop();
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Handle<Code> ic = BUILTIN_CODE(isolate, LoadIC);
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__ call(ic, RelocInfo::CODE_TARGET);
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__ nop();
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__ nop();
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__ jmp(&L1);
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__ jmp(Operand(rbx, rcx, times_4, 10000));
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__ jmp(ic, RelocInfo::CODE_TARGET);
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__ nop();
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Label Ljcc;
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__ nop();
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// long jumps
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__ j(overflow, &Ljcc);
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__ j(no_overflow, &Ljcc);
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__ j(below, &Ljcc);
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__ j(above_equal, &Ljcc);
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__ j(equal, &Ljcc);
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__ j(not_equal, &Ljcc);
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__ j(below_equal, &Ljcc);
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__ j(above, &Ljcc);
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__ j(sign, &Ljcc);
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__ j(not_sign, &Ljcc);
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__ j(parity_even, &Ljcc);
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__ j(parity_odd, &Ljcc);
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__ j(less, &Ljcc);
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__ j(greater_equal, &Ljcc);
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__ j(less_equal, &Ljcc);
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__ j(greater, &Ljcc);
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__ nop();
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__ bind(&Ljcc);
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// short jumps
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__ j(overflow, &Ljcc);
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__ j(no_overflow, &Ljcc);
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__ j(below, &Ljcc);
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__ j(above_equal, &Ljcc);
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__ j(equal, &Ljcc);
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__ j(not_equal, &Ljcc);
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__ j(below_equal, &Ljcc);
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__ j(above, &Ljcc);
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__ j(sign, &Ljcc);
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__ j(not_sign, &Ljcc);
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__ j(parity_even, &Ljcc);
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__ j(parity_odd, &Ljcc);
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__ j(less, &Ljcc);
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__ j(greater_equal, &Ljcc);
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__ j(less_equal, &Ljcc);
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__ j(greater, &Ljcc);
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// 0xD9 instructions
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__ nop();
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__ fld(1);
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__ fld1();
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__ fldz();
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__ fldpi();
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__ fabs();
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__ fchs();
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__ fprem();
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__ fprem1();
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__ fincstp();
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__ ftst();
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__ fxch(3);
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__ fld_s(Operand(rbx, rcx, times_4, 10000));
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__ fstp_s(Operand(rbx, rcx, times_4, 10000));
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__ ffree(3);
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__ fld_d(Operand(rbx, rcx, times_4, 10000));
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__ fstp_d(Operand(rbx, rcx, times_4, 10000));
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__ nop();
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__ fild_s(Operand(rbx, rcx, times_4, 10000));
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__ fistp_s(Operand(rbx, rcx, times_4, 10000));
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__ fild_d(Operand(rbx, rcx, times_4, 10000));
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__ fistp_d(Operand(rbx, rcx, times_4, 10000));
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__ fnstsw_ax();
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__ nop();
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__ fadd(3);
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__ fsub(3);
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__ fmul(3);
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__ fdiv(3);
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__ faddp(3);
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__ fsubp(3);
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__ fmulp(3);
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__ fdivp(3);
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__ fcompp();
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__ fwait();
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__ frndint();
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__ fninit();
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__ nop();
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// SSE instruction
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{
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// Move operation
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__ cvttss2si(rdx, Operand(rbx, rcx, times_4, 10000));
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__ cvttss2si(rdx, xmm1);
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__ cvtsd2ss(xmm0, xmm1);
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__ cvtsd2ss(xmm0, Operand(rbx, rcx, times_4, 10000));
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__ cvttps2dq(xmm0, xmm1);
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__ cvttps2dq(xmm0, Operand(rbx, rcx, times_4, 10000));
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__ movaps(xmm0, xmm1);
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__ movdqa(xmm0, Operand(rsp, 12));
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__ movdqa(Operand(rsp, 12), xmm0);
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__ movdqu(xmm0, Operand(rsp, 12));
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__ movdqu(Operand(rsp, 12), xmm0);
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__ shufps(xmm0, xmm9, 0x0);
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// logic operation
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__ andps(xmm0, xmm1);
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__ andps(xmm0, Operand(rbx, rcx, times_4, 10000));
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__ andnps(xmm0, xmm1);
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__ andnps(xmm0, Operand(rbx, rcx, times_4, 10000));
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__ orps(xmm0, xmm1);
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__ orps(xmm0, Operand(rbx, rcx, times_4, 10000));
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__ xorps(xmm0, xmm1);
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__ xorps(xmm0, Operand(rbx, rcx, times_4, 10000));
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// Arithmetic operation
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__ addss(xmm1, xmm0);
|
|
__ addss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ mulss(xmm1, xmm0);
|
|
__ mulss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ subss(xmm1, xmm0);
|
|
__ subss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ divss(xmm1, xmm0);
|
|
__ divss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ maxss(xmm1, xmm0);
|
|
__ maxss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ minss(xmm1, xmm0);
|
|
__ minss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ sqrtss(xmm1, xmm0);
|
|
__ sqrtss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ addps(xmm1, xmm0);
|
|
__ addps(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ subps(xmm1, xmm0);
|
|
__ subps(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ mulps(xmm1, xmm0);
|
|
__ mulps(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ divps(xmm1, xmm0);
|
|
__ divps(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
|
|
__ ucomiss(xmm0, xmm1);
|
|
__ ucomiss(xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
}
|
|
|
|
// SSE2 instructions
|
|
{
|
|
__ cvttsd2si(rdx, Operand(rbx, rcx, times_4, 10000));
|
|
__ cvttsd2si(rdx, xmm1);
|
|
__ cvttsd2siq(rdx, xmm1);
|
|
__ cvttsd2siq(rdx, Operand(rbx, rcx, times_4, 10000));
|
|
__ cvtqsi2sd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ cvtqsi2sd(xmm1, rdx);
|
|
__ movsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ movsd(Operand(rbx, rcx, times_4, 10000), xmm1);
|
|
// 128 bit move instructions.
|
|
__ movupd(xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
__ movupd(Operand(rbx, rcx, times_4, 10000), xmm0);
|
|
__ movdqa(xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
__ movdqa(Operand(rbx, rcx, times_4, 10000), xmm0);
|
|
|
|
__ addsd(xmm1, xmm0);
|
|
__ addsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ mulsd(xmm1, xmm0);
|
|
__ mulsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ subsd(xmm1, xmm0);
|
|
__ subsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ divsd(xmm1, xmm0);
|
|
__ divsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ minsd(xmm1, xmm0);
|
|
__ minsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ maxsd(xmm1, xmm0);
|
|
__ maxsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ sqrtsd(xmm1, xmm0);
|
|
__ sqrtsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ ucomisd(xmm0, xmm1);
|
|
|
|
__ andpd(xmm0, xmm1);
|
|
__ andpd(xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
__ orpd(xmm0, xmm1);
|
|
__ orpd(xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
__ xorpd(xmm0, xmm1);
|
|
__ xorpd(xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
|
|
__ pslld(xmm0, 6);
|
|
__ psrld(xmm0, 6);
|
|
__ psllq(xmm0, 6);
|
|
__ psrlq(xmm0, 6);
|
|
|
|
__ pcmpeqd(xmm1, xmm0);
|
|
|
|
__ punpckldq(xmm1, xmm11);
|
|
__ punpckldq(xmm5, Operand(rdx, 4));
|
|
__ punpckhdq(xmm8, xmm15);
|
|
|
|
__ pshuflw(xmm2, xmm4, 3);
|
|
__ pshufhw(xmm1, xmm9, 6);
|
|
|
|
#define EMIT_SSE2_INSTR(instruction, notUsed1, notUsed2, notUsed3) \
|
|
__ instruction(xmm5, xmm1); \
|
|
__ instruction(xmm5, Operand(rdx, 4));
|
|
|
|
SSE2_INSTRUCTION_LIST(EMIT_SSE2_INSTR)
|
|
#undef EMIT_SSE2_INSTR
|
|
}
|
|
|
|
// cmov.
|
|
{
|
|
__ cmovq(overflow, rax, Operand(rax, 0));
|
|
__ cmovq(no_overflow, rax, Operand(rax, 1));
|
|
__ cmovq(below, rax, Operand(rax, 2));
|
|
__ cmovq(above_equal, rax, Operand(rax, 3));
|
|
__ cmovq(equal, rax, Operand(rbx, 0));
|
|
__ cmovq(not_equal, rax, Operand(rbx, 1));
|
|
__ cmovq(below_equal, rax, Operand(rbx, 2));
|
|
__ cmovq(above, rax, Operand(rbx, 3));
|
|
__ cmovq(sign, rax, Operand(rcx, 0));
|
|
__ cmovq(not_sign, rax, Operand(rcx, 1));
|
|
__ cmovq(parity_even, rax, Operand(rcx, 2));
|
|
__ cmovq(parity_odd, rax, Operand(rcx, 3));
|
|
__ cmovq(less, rax, Operand(rdx, 0));
|
|
__ cmovq(greater_equal, rax, Operand(rdx, 1));
|
|
__ cmovq(less_equal, rax, Operand(rdx, 2));
|
|
__ cmovq(greater, rax, Operand(rdx, 3));
|
|
}
|
|
|
|
{
|
|
if (CpuFeatures::IsSupported(SSE3)) {
|
|
CpuFeatureScope scope(&assm, SSE3);
|
|
__ haddps(xmm1, xmm0);
|
|
__ haddps(xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ lddqu(xmm1, Operand(rdx, 4));
|
|
__ movddup(xmm1, Operand(rax, 5));
|
|
__ movddup(xmm1, xmm2);
|
|
}
|
|
}
|
|
|
|
#define EMIT_SSE34_INSTR(instruction, notUsed1, notUsed2, notUsed3, notUsed4) \
|
|
__ instruction(xmm5, xmm1); \
|
|
__ instruction(xmm5, Operand(rdx, 4));
|
|
|
|
{
|
|
if (CpuFeatures::IsSupported(SSSE3)) {
|
|
CpuFeatureScope scope(&assm, SSSE3);
|
|
__ palignr(xmm5, xmm1, 5);
|
|
__ palignr(xmm5, Operand(rdx, 4), 5);
|
|
SSSE3_INSTRUCTION_LIST(EMIT_SSE34_INSTR)
|
|
}
|
|
}
|
|
|
|
{
|
|
if (CpuFeatures::IsSupported(SSE4_1)) {
|
|
CpuFeatureScope scope(&assm, SSE4_1);
|
|
__ insertps(xmm5, xmm1, 123);
|
|
__ extractps(rax, xmm1, 0);
|
|
__ pextrw(rbx, xmm2, 1);
|
|
__ pinsrw(xmm2, rcx, 1);
|
|
__ pextrd(rbx, xmm15, 0);
|
|
__ pextrd(r12, xmm0, 1);
|
|
__ pextrq(r12, xmm0, 1);
|
|
__ pinsrd(xmm9, r9, 0);
|
|
__ pinsrd(xmm5, Operand(rax, 4), 1);
|
|
__ pinsrq(xmm9, r9, 0);
|
|
__ pinsrq(xmm5, Operand(rax, 4), 1);
|
|
__ pblendw(xmm5, xmm1, 1);
|
|
__ pblendw(xmm9, Operand(rax, 4), 1);
|
|
|
|
__ cmpps(xmm5, xmm1, 1);
|
|
__ cmpps(xmm5, Operand(rbx, rcx, times_4, 10000), 1);
|
|
__ cmpeqps(xmm5, xmm1);
|
|
__ cmpeqps(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpltps(xmm5, xmm1);
|
|
__ cmpltps(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpleps(xmm5, xmm1);
|
|
__ cmpleps(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpneqps(xmm5, xmm1);
|
|
__ cmpneqps(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpnltps(xmm5, xmm1);
|
|
__ cmpnltps(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpnleps(xmm5, xmm1);
|
|
__ cmpnleps(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmppd(xmm5, xmm1, 1);
|
|
__ cmppd(xmm5, Operand(rbx, rcx, times_4, 10000), 1);
|
|
__ cmpeqpd(xmm5, xmm1);
|
|
__ cmpeqpd(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpltpd(xmm5, xmm1);
|
|
__ cmpltpd(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmplepd(xmm5, xmm1);
|
|
__ cmplepd(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpneqpd(xmm5, xmm1);
|
|
__ cmpneqpd(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpnltpd(xmm5, xmm1);
|
|
__ cmpnltpd(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
__ cmpnlepd(xmm5, xmm1);
|
|
__ cmpnlepd(xmm5, Operand(rbx, rcx, times_4, 10000));
|
|
|
|
__ minps(xmm5, xmm1);
|
|
__ minps(xmm5, Operand(rdx, 4));
|
|
__ maxps(xmm5, xmm1);
|
|
__ maxps(xmm5, Operand(rdx, 4));
|
|
__ rcpps(xmm5, xmm1);
|
|
__ rcpps(xmm5, Operand(rdx, 4));
|
|
__ sqrtps(xmm5, xmm1);
|
|
__ sqrtps(xmm5, Operand(rdx, 4));
|
|
__ movups(xmm5, xmm1);
|
|
__ movups(xmm5, Operand(rdx, 4));
|
|
__ movups(Operand(rdx, 4), xmm5);
|
|
__ pmulld(xmm5, xmm1);
|
|
__ pmulld(xmm5, Operand(rdx, 4));
|
|
__ pmullw(xmm5, xmm1);
|
|
__ pmullw(xmm5, Operand(rdx, 4));
|
|
__ pmuludq(xmm5, xmm1);
|
|
__ pmuludq(xmm5, Operand(rdx, 4));
|
|
__ psrldq(xmm5, 123);
|
|
__ pshufd(xmm5, xmm1, 3);
|
|
__ cvtps2dq(xmm5, xmm1);
|
|
__ cvtps2dq(xmm5, Operand(rdx, 4));
|
|
__ cvtdq2ps(xmm5, xmm1);
|
|
__ cvtdq2ps(xmm5, Operand(rdx, 4));
|
|
|
|
SSE4_INSTRUCTION_LIST(EMIT_SSE34_INSTR)
|
|
}
|
|
}
|
|
|
|
{
|
|
if (CpuFeatures::IsSupported(SSE4_2)) {
|
|
CpuFeatureScope scope(&assm, SSE4_2);
|
|
|
|
SSE4_2_INSTRUCTION_LIST(EMIT_SSE34_INSTR)
|
|
}
|
|
}
|
|
#undef EMIT_SSE34_INSTR
|
|
|
|
// AVX instruction
|
|
{
|
|
if (CpuFeatures::IsSupported(AVX)) {
|
|
CpuFeatureScope scope(&assm, AVX);
|
|
__ vmovss(xmm6, xmm14, xmm2);
|
|
__ vmovss(xmm9, Operand(rbx, rcx, times_4, 10000));
|
|
__ vmovss(Operand(rbx, rcx, times_4, 10000), xmm0);
|
|
|
|
__ vaddss(xmm0, xmm1, xmm2);
|
|
__ vaddss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vmulss(xmm0, xmm1, xmm2);
|
|
__ vmulss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vsubss(xmm0, xmm1, xmm2);
|
|
__ vsubss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vdivss(xmm0, xmm1, xmm2);
|
|
__ vdivss(xmm0, xmm1, Operand(rbx, rcx, times_2, 10000));
|
|
__ vminss(xmm8, xmm1, xmm2);
|
|
__ vminss(xmm9, xmm1, Operand(rbx, rcx, times_8, 10000));
|
|
__ vmaxss(xmm8, xmm1, xmm2);
|
|
__ vmaxss(xmm9, xmm1, Operand(rbx, rcx, times_1, 10000));
|
|
__ vsqrtss(xmm8, xmm1, xmm2);
|
|
__ vsqrtss(xmm9, xmm1, Operand(rbx, rcx, times_1, 10000));
|
|
__ vmovss(xmm9, Operand(r11, rcx, times_8, -10000));
|
|
__ vmovss(Operand(rbx, r9, times_4, 10000), xmm1);
|
|
__ vucomiss(xmm9, xmm1);
|
|
__ vucomiss(xmm8, Operand(rbx, rdx, times_2, 10981));
|
|
|
|
__ vmovd(xmm5, rdi);
|
|
__ vmovd(xmm9, Operand(rbx, rcx, times_4, 10000));
|
|
__ vmovd(r9, xmm6);
|
|
__ vmovq(xmm5, rdi);
|
|
__ vmovq(xmm9, Operand(rbx, rcx, times_4, 10000));
|
|
__ vmovq(r9, xmm6);
|
|
|
|
__ vmovsd(xmm6, xmm14, xmm2);
|
|
__ vmovsd(xmm9, Operand(rbx, rcx, times_4, 10000));
|
|
__ vmovsd(Operand(rbx, rcx, times_4, 10000), xmm0);
|
|
|
|
__ vaddsd(xmm0, xmm1, xmm2);
|
|
__ vaddsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vmulsd(xmm0, xmm1, xmm2);
|
|
__ vmulsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vsubsd(xmm0, xmm1, xmm2);
|
|
__ vsubsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vdivsd(xmm0, xmm1, xmm2);
|
|
__ vdivsd(xmm0, xmm1, Operand(rbx, rcx, times_2, 10000));
|
|
__ vminsd(xmm8, xmm1, xmm2);
|
|
__ vminsd(xmm9, xmm1, Operand(rbx, rcx, times_8, 10000));
|
|
__ vmaxsd(xmm8, xmm1, xmm2);
|
|
__ vmaxsd(xmm9, xmm1, Operand(rbx, rcx, times_1, 10000));
|
|
__ vroundsd(xmm8, xmm3, xmm0, kRoundDown);
|
|
__ vsqrtsd(xmm8, xmm1, xmm2);
|
|
__ vsqrtsd(xmm9, xmm1, Operand(rbx, rcx, times_1, 10000));
|
|
__ vucomisd(xmm9, xmm1);
|
|
__ vucomisd(xmm8, Operand(rbx, rdx, times_2, 10981));
|
|
|
|
__ vcvtss2sd(xmm4, xmm9, xmm11);
|
|
__ vcvtsd2ss(xmm9, xmm3, xmm2);
|
|
__ vcvtss2sd(xmm4, xmm9, Operand(rbx, rcx, times_1, 10000));
|
|
__ vcvtsd2ss(xmm9, xmm3, Operand(rbx, rcx, times_1, 10000));
|
|
__ vcvtlsi2sd(xmm5, xmm9, rcx);
|
|
__ vcvtlsi2sd(xmm9, xmm3, Operand(rbx, r9, times_4, 10000));
|
|
__ vcvtqsi2sd(xmm5, xmm9, r11);
|
|
__ vcvttsd2si(r9, xmm6);
|
|
__ vcvttsd2si(rax, Operand(rbx, r9, times_4, 10000));
|
|
__ vcvttsd2siq(rdi, xmm9);
|
|
__ vcvttsd2siq(r8, Operand(r9, rbx, times_4, 10000));
|
|
__ vcvtsd2si(rdi, xmm9);
|
|
|
|
__ vmovaps(xmm10, xmm11);
|
|
__ vmovapd(xmm7, xmm0);
|
|
__ vmovupd(xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
__ vmovupd(Operand(rbx, rcx, times_4, 10000), xmm0);
|
|
__ vmovmskpd(r9, xmm4);
|
|
|
|
__ vmovups(xmm5, xmm1);
|
|
__ vmovups(xmm5, Operand(rdx, 4));
|
|
__ vmovups(Operand(rdx, 4), xmm5);
|
|
|
|
__ vandps(xmm0, xmm9, xmm2);
|
|
__ vandps(xmm9, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vandnps(xmm0, xmm9, xmm2);
|
|
__ vandnps(xmm9, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vxorps(xmm0, xmm1, xmm9);
|
|
__ vxorps(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vhaddps(xmm0, xmm1, xmm9);
|
|
__ vhaddps(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
|
|
__ vandpd(xmm0, xmm9, xmm2);
|
|
__ vandpd(xmm9, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vorpd(xmm0, xmm1, xmm9);
|
|
__ vorpd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
__ vxorpd(xmm0, xmm1, xmm9);
|
|
__ vxorpd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
|
|
|
|
__ vpcmpeqd(xmm0, xmm15, xmm5);
|
|
__ vpcmpeqd(xmm15, xmm0, Operand(rbx, rcx, times_4, 10000));
|
|
__ vpsllq(xmm0, xmm15, 21);
|
|
__ vpsrlq(xmm15, xmm0, 21);
|
|
|
|
__ vcmpps(xmm5, xmm4, xmm1, 1);
|
|
__ vcmpps(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000), 1);
|
|
__ vcmpeqps(xmm5, xmm4, xmm1);
|
|
__ vcmpeqps(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpltps(xmm5, xmm4, xmm1);
|
|
__ vcmpltps(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpleps(xmm5, xmm4, xmm1);
|
|
__ vcmpleps(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpneqps(xmm5, xmm4, xmm1);
|
|
__ vcmpneqps(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpnltps(xmm5, xmm4, xmm1);
|
|
__ vcmpnltps(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpnleps(xmm5, xmm4, xmm1);
|
|
__ vcmpnleps(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmppd(xmm5, xmm4, xmm1, 1);
|
|
__ vcmppd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000), 1);
|
|
__ vcmpeqpd(xmm5, xmm4, xmm1);
|
|
__ vcmpeqpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpltpd(xmm5, xmm4, xmm1);
|
|
__ vcmpltpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmplepd(xmm5, xmm4, xmm1);
|
|
__ vcmplepd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpneqpd(xmm5, xmm4, xmm1);
|
|
__ vcmpneqpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpnltpd(xmm5, xmm4, xmm1);
|
|
__ vcmpnltpd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
__ vcmpnlepd(xmm5, xmm4, xmm1);
|
|
__ vcmpnlepd(xmm5, xmm4, Operand(rbx, rcx, times_4, 10000));
|
|
|
|
#define EMIT_SSE2_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3) \
|
|
__ v##instruction(xmm10, xmm5, xmm1); \
|
|
__ v##instruction(xmm10, xmm5, Operand(rdx, 4));
|
|
|
|
#define EMIT_SSE34_AVXINSTR(instruction, notUsed1, notUsed2, notUsed3, \
|
|
notUsed4) \
|
|
__ v##instruction(xmm10, xmm5, xmm1); \
|
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__ v##instruction(xmm10, xmm5, Operand(rdx, 4));
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SSE2_INSTRUCTION_LIST(EMIT_SSE2_AVXINSTR)
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SSSE3_INSTRUCTION_LIST(EMIT_SSE34_AVXINSTR)
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SSE4_INSTRUCTION_LIST(EMIT_SSE34_AVXINSTR)
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#undef EMIT_SSE2_AVXINSTR
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#undef EMIT_SSE34_AVXINSTR
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__ vlddqu(xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vpsllw(xmm0, xmm15, 21);
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__ vpsrlw(xmm0, xmm15, 21);
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__ vpsraw(xmm0, xmm15, 21);
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__ vpsrad(xmm0, xmm15, 21);
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__ vpextrb(rax, xmm2, 12);
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__ vpextrb(Operand(rbx, rcx, times_4, 10000), xmm2, 12);
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__ vpextrw(rax, xmm2, 5);
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__ vpextrw(Operand(rbx, rcx, times_4, 10000), xmm2, 5);
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__ vpextrd(rax, xmm2, 2);
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__ vpextrd(Operand(rbx, rcx, times_4, 10000), xmm2, 2);
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__ vpinsrb(xmm1, xmm2, rax, 12);
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__ vpinsrb(xmm1, xmm2, Operand(rbx, rcx, times_4, 10000), 12);
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__ vpinsrw(xmm1, xmm2, rax, 5);
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__ vpinsrw(xmm1, xmm2, Operand(rbx, rcx, times_4, 10000), 5);
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__ vpinsrd(xmm1, xmm2, rax, 2);
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__ vpinsrd(xmm1, xmm2, Operand(rbx, rcx, times_4, 10000), 2);
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__ vpshufd(xmm1, xmm2, 85);
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}
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}
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// FMA3 instruction
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{
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if (CpuFeatures::IsSupported(FMA3)) {
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CpuFeatureScope scope(&assm, FMA3);
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__ vfmadd132sd(xmm0, xmm1, xmm2);
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__ vfmadd132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmadd213sd(xmm0, xmm1, xmm2);
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__ vfmadd213sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmadd231sd(xmm0, xmm1, xmm2);
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__ vfmadd231sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmadd132sd(xmm9, xmm10, xmm11);
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__ vfmadd132sd(xmm9, xmm10, Operand(r9, r11, times_4, 10000));
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__ vfmadd213sd(xmm9, xmm10, xmm11);
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__ vfmadd213sd(xmm9, xmm10, Operand(r9, r11, times_4, 10000));
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__ vfmadd231sd(xmm9, xmm10, xmm11);
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__ vfmadd231sd(xmm9, xmm10, Operand(r9, r11, times_4, 10000));
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__ vfmsub132sd(xmm0, xmm1, xmm2);
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__ vfmsub132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmsub213sd(xmm0, xmm1, xmm2);
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__ vfmsub213sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmsub231sd(xmm0, xmm1, xmm2);
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__ vfmsub231sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmadd132sd(xmm0, xmm1, xmm2);
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__ vfnmadd132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmadd213sd(xmm0, xmm1, xmm2);
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__ vfnmadd213sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmadd231sd(xmm0, xmm1, xmm2);
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__ vfnmadd231sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmsub132sd(xmm0, xmm1, xmm2);
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__ vfnmsub132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmsub213sd(xmm0, xmm1, xmm2);
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__ vfnmsub213sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmsub231sd(xmm0, xmm1, xmm2);
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__ vfnmsub231sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmadd132ss(xmm0, xmm1, xmm2);
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__ vfmadd132ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmadd213ss(xmm0, xmm1, xmm2);
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__ vfmadd213ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmadd231ss(xmm0, xmm1, xmm2);
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__ vfmadd231ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmsub132ss(xmm0, xmm1, xmm2);
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__ vfmsub132ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmsub213ss(xmm0, xmm1, xmm2);
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__ vfmsub213ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfmsub231ss(xmm0, xmm1, xmm2);
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__ vfmsub231ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmadd132ss(xmm0, xmm1, xmm2);
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__ vfnmadd132ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmadd213ss(xmm0, xmm1, xmm2);
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__ vfnmadd213ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmadd231ss(xmm0, xmm1, xmm2);
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__ vfnmadd231ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmsub132ss(xmm0, xmm1, xmm2);
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__ vfnmsub132ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmsub213ss(xmm0, xmm1, xmm2);
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__ vfnmsub213ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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__ vfnmsub231ss(xmm0, xmm1, xmm2);
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__ vfnmsub231ss(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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}
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}
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// BMI1 instructions
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{
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if (CpuFeatures::IsSupported(BMI1)) {
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CpuFeatureScope scope(&assm, BMI1);
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__ andnq(rax, rbx, rcx);
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__ andnq(rax, rbx, Operand(rbx, rcx, times_4, 10000));
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__ andnl(rax, rbx, rcx);
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__ andnl(rax, rbx, Operand(rbx, rcx, times_4, 10000));
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__ bextrq(rax, rbx, rcx);
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__ bextrq(rax, Operand(rbx, rcx, times_4, 10000), rbx);
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__ bextrl(rax, rbx, rcx);
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__ bextrl(rax, Operand(rbx, rcx, times_4, 10000), rbx);
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__ blsiq(rax, rbx);
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__ blsiq(rax, Operand(rbx, rcx, times_4, 10000));
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__ blsil(rax, rbx);
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__ blsil(rax, Operand(rbx, rcx, times_4, 10000));
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__ blsmskq(rax, rbx);
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__ blsmskq(rax, Operand(rbx, rcx, times_4, 10000));
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__ blsmskl(rax, rbx);
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__ blsmskl(rax, Operand(rbx, rcx, times_4, 10000));
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__ blsrq(rax, rbx);
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__ blsrq(rax, Operand(rbx, rcx, times_4, 10000));
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__ blsrl(rax, rbx);
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__ blsrl(rax, Operand(rbx, rcx, times_4, 10000));
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__ tzcntq(rax, rbx);
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__ tzcntq(rax, Operand(rbx, rcx, times_4, 10000));
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|
__ tzcntl(rax, rbx);
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|
__ tzcntl(rax, Operand(rbx, rcx, times_4, 10000));
|
|
}
|
|
}
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|
|
// LZCNT instructions
|
|
{
|
|
if (CpuFeatures::IsSupported(LZCNT)) {
|
|
CpuFeatureScope scope(&assm, LZCNT);
|
|
__ lzcntq(rax, rbx);
|
|
__ lzcntq(rax, Operand(rbx, rcx, times_4, 10000));
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|
__ lzcntl(rax, rbx);
|
|
__ lzcntl(rax, Operand(rbx, rcx, times_4, 10000));
|
|
}
|
|
}
|
|
|
|
// POPCNT instructions
|
|
{
|
|
if (CpuFeatures::IsSupported(POPCNT)) {
|
|
CpuFeatureScope scope(&assm, POPCNT);
|
|
__ popcntq(rax, rbx);
|
|
__ popcntq(rax, Operand(rbx, rcx, times_4, 10000));
|
|
__ popcntl(rax, rbx);
|
|
__ popcntl(rax, Operand(rbx, rcx, times_4, 10000));
|
|
}
|
|
}
|
|
|
|
// BMI2 instructions
|
|
{
|
|
if (CpuFeatures::IsSupported(BMI2)) {
|
|
CpuFeatureScope scope(&assm, BMI2);
|
|
__ bzhiq(rax, rbx, rcx);
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|
__ bzhiq(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ bzhil(rax, rbx, rcx);
|
|
__ bzhil(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ mulxq(rax, rbx, rcx);
|
|
__ mulxq(rax, rbx, Operand(rbx, rcx, times_4, 10000));
|
|
__ mulxl(rax, rbx, rcx);
|
|
__ mulxl(rax, rbx, Operand(rbx, rcx, times_4, 10000));
|
|
__ pdepq(rax, rbx, rcx);
|
|
__ pdepq(rax, rbx, Operand(rbx, rcx, times_4, 10000));
|
|
__ pdepl(rax, rbx, rcx);
|
|
__ pdepl(rax, rbx, Operand(rbx, rcx, times_4, 10000));
|
|
__ pextq(rax, rbx, rcx);
|
|
__ pextq(rax, rbx, Operand(rbx, rcx, times_4, 10000));
|
|
__ pextl(rax, rbx, rcx);
|
|
__ pextl(rax, rbx, Operand(rbx, rcx, times_4, 10000));
|
|
__ sarxq(rax, rbx, rcx);
|
|
__ sarxq(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ sarxl(rax, rbx, rcx);
|
|
__ sarxl(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ shlxq(rax, rbx, rcx);
|
|
__ shlxq(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ shlxl(rax, rbx, rcx);
|
|
__ shlxl(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ shrxq(rax, rbx, rcx);
|
|
__ shrxq(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ shrxl(rax, rbx, rcx);
|
|
__ shrxl(rax, Operand(rbx, rcx, times_4, 10000), rbx);
|
|
__ rorxq(rax, rbx, 63);
|
|
__ rorxq(rax, Operand(rbx, rcx, times_4, 10000), 63);
|
|
__ rorxl(rax, rbx, 31);
|
|
__ rorxl(rax, Operand(rbx, rcx, times_4, 10000), 31);
|
|
}
|
|
}
|
|
|
|
// xchg.
|
|
{
|
|
__ xchgb(rax, Operand(rax, 8));
|
|
__ xchgw(rax, Operand(rbx, 8));
|
|
__ xchgq(rax, rax);
|
|
__ xchgq(rax, rbx);
|
|
__ xchgq(rbx, rbx);
|
|
__ xchgq(rbx, Operand(rsp, 12));
|
|
}
|
|
|
|
// cmpxchg.
|
|
{
|
|
__ cmpxchgb(Operand(rsp, 12), rax);
|
|
__ cmpxchgw(Operand(rbx, rcx, times_4, 10000), rax);
|
|
__ cmpxchgl(Operand(rbx, rcx, times_4, 10000), rax);
|
|
__ cmpxchgq(Operand(rbx, rcx, times_4, 10000), rax);
|
|
}
|
|
|
|
// lock prefix.
|
|
{
|
|
__ lock();
|
|
__ cmpxchgl(Operand(rsp, 12), rbx);
|
|
|
|
__ lock();
|
|
__ xchgw(rax, Operand(rcx, 8));
|
|
}
|
|
|
|
// Nop instructions
|
|
for (int i = 0; i < 16; i++) {
|
|
__ Nop(i);
|
|
}
|
|
|
|
__ mfence();
|
|
__ lfence();
|
|
__ pause();
|
|
__ ret(0);
|
|
|
|
CodeDesc desc;
|
|
assm.GetCode(isolate, &desc);
|
|
Handle<Code> code = Factory::CodeBuilder(isolate, desc, Code::STUB).Build();
|
|
USE(code);
|
|
#ifdef OBJECT_PRINT
|
|
StdoutStream os;
|
|
code->Print(os);
|
|
Address begin = code->raw_instruction_start();
|
|
Address end = code->raw_instruction_end();
|
|
disasm::Disassembler::Disassemble(stdout, reinterpret_cast<byte*>(begin),
|
|
reinterpret_cast<byte*>(end));
|
|
#endif
|
|
}
|
|
|
|
#undef __
|
|
|
|
} // namespace internal
|
|
} // namespace v8
|