e95bc7eec8
BUG=v8:3113 LOG=Y R=jochen@chromium.org, rmcilroy@chromium.org, rodolph.perfetta@arm.com Review URL: https://codereview.chromium.org/148293020 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19311 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
427 lines
13 KiB
C++
427 lines
13 KiB
C++
// Copyright 2013 the V8 project authors. All rights reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include "v8.h"
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#include "macro-assembler.h"
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#include "a64/utils-a64.h"
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#include "cctest.h"
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#include "test-utils-a64.h"
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using namespace v8::internal;
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#define __ masm->
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bool Equal32(uint32_t expected, const RegisterDump*, uint32_t result) {
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if (result != expected) {
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printf("Expected 0x%08" PRIx32 "\t Found 0x%08" PRIx32 "\n",
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expected, result);
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}
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return expected == result;
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}
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bool Equal64(uint64_t expected, const RegisterDump*, uint64_t result) {
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if (result != expected) {
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printf("Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
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expected, result);
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}
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return expected == result;
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}
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bool EqualFP32(float expected, const RegisterDump*, float result) {
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if (float_to_rawbits(expected) == float_to_rawbits(result)) {
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return true;
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} else {
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if (isnan(expected) || (expected == 0.0)) {
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printf("Expected 0x%08" PRIx32 "\t Found 0x%08" PRIx32 "\n",
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float_to_rawbits(expected), float_to_rawbits(result));
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} else {
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printf("Expected %.9f (0x%08" PRIx32 ")\t "
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"Found %.9f (0x%08" PRIx32 ")\n",
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expected, float_to_rawbits(expected),
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result, float_to_rawbits(result));
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}
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return false;
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}
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}
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bool EqualFP64(double expected, const RegisterDump*, double result) {
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if (double_to_rawbits(expected) == double_to_rawbits(result)) {
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return true;
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}
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if (isnan(expected) || (expected == 0.0)) {
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printf("Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
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double_to_rawbits(expected), double_to_rawbits(result));
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} else {
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printf("Expected %.17f (0x%016" PRIx64 ")\t "
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"Found %.17f (0x%016" PRIx64 ")\n",
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expected, double_to_rawbits(expected),
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result, double_to_rawbits(result));
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}
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return false;
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}
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bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg) {
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ASSERT(reg.Is32Bits());
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// Retrieve the corresponding X register so we can check that the upper part
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// was properly cleared.
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int64_t result_x = core->xreg(reg.code());
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if ((result_x & 0xffffffff00000000L) != 0) {
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printf("Expected 0x%08" PRIx32 "\t Found 0x%016" PRIx64 "\n",
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expected, result_x);
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return false;
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}
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uint32_t result_w = core->wreg(reg.code());
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return Equal32(expected, core, result_w);
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}
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bool Equal64(uint64_t expected,
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const RegisterDump* core,
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const Register& reg) {
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ASSERT(reg.Is64Bits());
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uint64_t result = core->xreg(reg.code());
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return Equal64(expected, core, result);
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}
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bool EqualFP32(float expected,
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const RegisterDump* core,
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const FPRegister& fpreg) {
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ASSERT(fpreg.Is32Bits());
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// Retrieve the corresponding D register so we can check that the upper part
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// was properly cleared.
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uint64_t result_64 = core->dreg_bits(fpreg.code());
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if ((result_64 & 0xffffffff00000000L) != 0) {
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printf("Expected 0x%08" PRIx32 " (%f)\t Found 0x%016" PRIx64 "\n",
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float_to_rawbits(expected), expected, result_64);
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return false;
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}
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return EqualFP32(expected, core, core->sreg(fpreg.code()));
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}
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bool EqualFP64(double expected,
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const RegisterDump* core,
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const FPRegister& fpreg) {
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ASSERT(fpreg.Is64Bits());
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return EqualFP64(expected, core, core->dreg(fpreg.code()));
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}
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bool Equal64(const Register& reg0,
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const RegisterDump* core,
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const Register& reg1) {
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ASSERT(reg0.Is64Bits() && reg1.Is64Bits());
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int64_t expected = core->xreg(reg0.code());
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int64_t result = core->xreg(reg1.code());
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return Equal64(expected, core, result);
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}
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static char FlagN(uint32_t flags) {
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return (flags & NFlag) ? 'N' : 'n';
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}
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static char FlagZ(uint32_t flags) {
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return (flags & ZFlag) ? 'Z' : 'z';
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}
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static char FlagC(uint32_t flags) {
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return (flags & CFlag) ? 'C' : 'c';
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}
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static char FlagV(uint32_t flags) {
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return (flags & VFlag) ? 'V' : 'v';
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}
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bool EqualNzcv(uint32_t expected, uint32_t result) {
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ASSERT((expected & ~NZCVFlag) == 0);
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ASSERT((result & ~NZCVFlag) == 0);
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if (result != expected) {
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printf("Expected: %c%c%c%c\t Found: %c%c%c%c\n",
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FlagN(expected), FlagZ(expected), FlagC(expected), FlagV(expected),
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FlagN(result), FlagZ(result), FlagC(result), FlagV(result));
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return false;
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}
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return true;
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}
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bool EqualRegisters(const RegisterDump* a, const RegisterDump* b) {
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for (unsigned i = 0; i < kNumberOfRegisters; i++) {
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if (a->xreg(i) != b->xreg(i)) {
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printf("x%d\t Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
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i, a->xreg(i), b->xreg(i));
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return false;
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}
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}
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for (unsigned i = 0; i < kNumberOfFPRegisters; i++) {
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uint64_t a_bits = a->dreg_bits(i);
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uint64_t b_bits = b->dreg_bits(i);
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if (a_bits != b_bits) {
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printf("d%d\t Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
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i, a_bits, b_bits);
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return false;
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}
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}
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return true;
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}
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RegList PopulateRegisterArray(Register* w, Register* x, Register* r,
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int reg_size, int reg_count, RegList allowed) {
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RegList list = 0;
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int i = 0;
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for (unsigned n = 0; (n < kNumberOfRegisters) && (i < reg_count); n++) {
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if (((1UL << n) & allowed) != 0) {
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// Only assign allowed registers.
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if (r) {
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r[i] = Register::Create(n, reg_size);
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}
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if (x) {
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x[i] = Register::Create(n, kXRegSize);
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}
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if (w) {
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w[i] = Register::Create(n, kWRegSize);
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}
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list |= (1UL << n);
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i++;
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}
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}
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// Check that we got enough registers.
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ASSERT(CountSetBits(list, kNumberOfRegisters) == reg_count);
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return list;
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}
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RegList PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v,
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int reg_size, int reg_count, RegList allowed) {
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RegList list = 0;
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int i = 0;
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for (unsigned n = 0; (n < kNumberOfFPRegisters) && (i < reg_count); n++) {
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if (((1UL << n) & allowed) != 0) {
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// Only assigned allowed registers.
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if (v) {
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v[i] = FPRegister::Create(n, reg_size);
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}
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if (d) {
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d[i] = FPRegister::Create(n, kDRegSize);
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}
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if (s) {
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s[i] = FPRegister::Create(n, kSRegSize);
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}
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list |= (1UL << n);
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i++;
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}
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}
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// Check that we got enough registers.
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ASSERT(CountSetBits(list, kNumberOfFPRegisters) == reg_count);
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return list;
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}
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void Clobber(MacroAssembler* masm, RegList reg_list, uint64_t const value) {
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Register first = NoReg;
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for (unsigned i = 0; i < kNumberOfRegisters; i++) {
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if (reg_list & (1UL << i)) {
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Register xn = Register::Create(i, kXRegSize);
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// We should never write into csp here.
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ASSERT(!xn.Is(csp));
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if (!xn.IsZero()) {
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if (!first.IsValid()) {
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// This is the first register we've hit, so construct the literal.
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__ Mov(xn, value);
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first = xn;
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} else {
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// We've already loaded the literal, so re-use the value already
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// loaded into the first register we hit.
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__ Mov(xn, first);
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}
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}
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}
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}
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}
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void ClobberFP(MacroAssembler* masm, RegList reg_list, double const value) {
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FPRegister first = NoFPReg;
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for (unsigned i = 0; i < kNumberOfFPRegisters; i++) {
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if (reg_list & (1UL << i)) {
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FPRegister dn = FPRegister::Create(i, kDRegSize);
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if (!first.IsValid()) {
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// This is the first register we've hit, so construct the literal.
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__ Fmov(dn, value);
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first = dn;
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} else {
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// We've already loaded the literal, so re-use the value already loaded
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// into the first register we hit.
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__ Fmov(dn, first);
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}
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}
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}
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}
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void Clobber(MacroAssembler* masm, CPURegList reg_list) {
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if (reg_list.type() == CPURegister::kRegister) {
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// This will always clobber X registers.
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Clobber(masm, reg_list.list());
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} else if (reg_list.type() == CPURegister::kFPRegister) {
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// This will always clobber D registers.
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ClobberFP(masm, reg_list.list());
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} else {
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UNREACHABLE();
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}
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}
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void RegisterDump::Dump(MacroAssembler* masm) {
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ASSERT(__ StackPointer().Is(csp));
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// Ensure that we don't unintentionally clobber any registers.
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Register old_tmp0 = __ Tmp0();
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Register old_tmp1 = __ Tmp1();
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FPRegister old_fptmp0 = __ FPTmp0();
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__ SetScratchRegisters(NoReg, NoReg);
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__ SetFPScratchRegister(NoFPReg);
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// Preserve some temporary registers.
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Register dump_base = x0;
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Register dump = x1;
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Register tmp = x2;
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Register dump_base_w = dump_base.W();
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Register dump_w = dump.W();
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Register tmp_w = tmp.W();
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// Offsets into the dump_ structure.
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const int x_offset = offsetof(dump_t, x_);
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const int w_offset = offsetof(dump_t, w_);
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const int d_offset = offsetof(dump_t, d_);
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const int s_offset = offsetof(dump_t, s_);
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const int sp_offset = offsetof(dump_t, sp_);
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const int wsp_offset = offsetof(dump_t, wsp_);
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const int flags_offset = offsetof(dump_t, flags_);
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__ Push(xzr, dump_base, dump, tmp);
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// Load the address where we will dump the state.
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__ Mov(dump_base, reinterpret_cast<uint64_t>(&dump_));
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// Dump the stack pointer (csp and wcsp).
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// The stack pointer cannot be stored directly; it needs to be moved into
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// another register first. Also, we pushed four X registers, so we need to
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// compensate here.
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__ Add(tmp, csp, 4 * kXRegSizeInBytes);
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__ Str(tmp, MemOperand(dump_base, sp_offset));
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__ Add(tmp_w, wcsp, 4 * kXRegSizeInBytes);
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__ Str(tmp_w, MemOperand(dump_base, wsp_offset));
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// Dump X registers.
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__ Add(dump, dump_base, x_offset);
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for (unsigned i = 0; i < kNumberOfRegisters; i += 2) {
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__ Stp(Register::XRegFromCode(i), Register::XRegFromCode(i + 1),
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MemOperand(dump, i * kXRegSizeInBytes));
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}
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// Dump W registers.
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__ Add(dump, dump_base, w_offset);
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for (unsigned i = 0; i < kNumberOfRegisters; i += 2) {
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__ Stp(Register::WRegFromCode(i), Register::WRegFromCode(i + 1),
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MemOperand(dump, i * kWRegSizeInBytes));
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}
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// Dump D registers.
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__ Add(dump, dump_base, d_offset);
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for (unsigned i = 0; i < kNumberOfFPRegisters; i += 2) {
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__ Stp(FPRegister::DRegFromCode(i), FPRegister::DRegFromCode(i + 1),
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MemOperand(dump, i * kDRegSizeInBytes));
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}
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// Dump S registers.
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__ Add(dump, dump_base, s_offset);
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for (unsigned i = 0; i < kNumberOfFPRegisters; i += 2) {
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__ Stp(FPRegister::SRegFromCode(i), FPRegister::SRegFromCode(i + 1),
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MemOperand(dump, i * kSRegSizeInBytes));
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}
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// Dump the flags.
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__ Mrs(tmp, NZCV);
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__ Str(tmp, MemOperand(dump_base, flags_offset));
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// To dump the values that were in tmp amd dump, we need a new scratch
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// register. We can use any of the already dumped registers since we can
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// easily restore them.
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Register dump2_base = x10;
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Register dump2 = x11;
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ASSERT(!AreAliased(dump_base, dump, tmp, dump2_base, dump2));
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// Don't lose the dump_ address.
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__ Mov(dump2_base, dump_base);
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__ Pop(tmp, dump, dump_base, xzr);
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__ Add(dump2, dump2_base, w_offset);
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__ Str(dump_base_w, MemOperand(dump2, dump_base.code() * kWRegSizeInBytes));
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__ Str(dump_w, MemOperand(dump2, dump.code() * kWRegSizeInBytes));
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__ Str(tmp_w, MemOperand(dump2, tmp.code() * kWRegSizeInBytes));
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__ Add(dump2, dump2_base, x_offset);
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__ Str(dump_base, MemOperand(dump2, dump_base.code() * kXRegSizeInBytes));
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__ Str(dump, MemOperand(dump2, dump.code() * kXRegSizeInBytes));
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__ Str(tmp, MemOperand(dump2, tmp.code() * kXRegSizeInBytes));
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// Finally, restore dump2_base and dump2.
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__ Ldr(dump2_base, MemOperand(dump2, dump2_base.code() * kXRegSizeInBytes));
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__ Ldr(dump2, MemOperand(dump2, dump2.code() * kXRegSizeInBytes));
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// Restore the MacroAssembler's scratch registers.
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__ SetScratchRegisters(old_tmp0, old_tmp1);
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__ SetFPScratchRegister(old_fptmp0);
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completed_ = true;
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}
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