00ac990cc3
- Changes tests to canonicalize FP slot/register moves, to simplify testing any implementations that may fragment FP register moves. - Adds code to generate correct ParallelMoves (e.g. no slot sources of different reps overlapping.) - Refactors test functions, so we can add manually generated tests to current fuzzed tests. - Adds SIMD operands, since these can be tested here now. LOG=N BUG=v8:4124 Review-Url: https://codereview.chromium.org/2365983002 Cr-Commit-Position: refs/heads/master@{#39943}
383 lines
13 KiB
C++
383 lines
13 KiB
C++
// Copyright 2014 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include "src/compiler/gap-resolver.h"
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#include "src/base/utils/random-number-generator.h"
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#include "test/cctest/cctest.h"
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namespace v8 {
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namespace internal {
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namespace compiler {
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const auto GetRegConfig = RegisterConfiguration::Turbofan;
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// Fragments the given operand into an equivalent set of operands to simplify
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// ParallelMove equivalence testing.
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void GetCanonicalOperands(const InstructionOperand& op,
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std::vector<InstructionOperand>* fragments) {
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CHECK(!kSimpleFPAliasing);
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CHECK(op.IsFPLocationOperand());
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// TODO(bbudge) Split into float operands on platforms with non-simple FP
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// register aliasing.
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fragments->push_back(op);
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}
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// The state of our move interpreter is the mapping of operands to values. Note
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// that the actual values don't really matter, all we care about is equality.
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class InterpreterState {
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public:
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void ExecuteInParallel(const ParallelMove* moves) {
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InterpreterState copy(*this);
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for (const auto m : *moves) {
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CHECK(!m->IsRedundant());
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const InstructionOperand& src = m->source();
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const InstructionOperand& dst = m->destination();
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if (!kSimpleFPAliasing && src.IsFPLocationOperand() &&
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dst.IsFPLocationOperand()) {
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// Canonicalize FP location-location moves.
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std::vector<InstructionOperand> src_fragments;
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GetCanonicalOperands(src, &src_fragments);
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CHECK(!src_fragments.empty());
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std::vector<InstructionOperand> dst_fragments;
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GetCanonicalOperands(dst, &dst_fragments);
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CHECK_EQ(src_fragments.size(), dst_fragments.size());
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for (size_t i = 0; i < src_fragments.size(); ++i) {
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write(dst_fragments[i], copy.read(src_fragments[i]));
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}
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continue;
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}
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// All other moves.
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write(dst, copy.read(src));
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}
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}
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bool operator==(const InterpreterState& other) const {
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return values_ == other.values_;
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}
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private:
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// struct for mapping operands to a unique value, that makes it easier to
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// detect illegal parallel moves, and to evaluate moves for equivalence. This
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// is a one way transformation. All general register and slot operands are
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// mapped to the default representation. FP registers and slots are mapped to
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// float64 except on architectures with non-simple FP register aliasing, where
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// the actual representation is used.
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struct Key {
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bool is_constant;
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MachineRepresentation rep;
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LocationOperand::LocationKind kind;
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int index;
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bool operator<(const Key& other) const {
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if (this->is_constant != other.is_constant) {
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return this->is_constant;
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}
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if (this->rep != other.rep) {
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return this->rep < other.rep;
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}
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if (this->kind != other.kind) {
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return this->kind < other.kind;
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}
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return this->index < other.index;
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}
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bool operator==(const Key& other) const {
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return this->is_constant == other.is_constant && this->rep == other.rep &&
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this->kind == other.kind && this->index == other.index;
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}
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};
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// Internally, the state is a normalized permutation of Value pairs.
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typedef Key Value;
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typedef std::map<Key, Value> OperandMap;
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Value read(const InstructionOperand& op) const {
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OperandMap::const_iterator it = values_.find(KeyFor(op));
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return (it == values_.end()) ? ValueFor(op) : it->second;
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}
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void write(const InstructionOperand& dst, Value v) {
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if (v == ValueFor(dst)) {
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values_.erase(KeyFor(dst));
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} else {
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values_[KeyFor(dst)] = v;
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}
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}
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static Key KeyFor(const InstructionOperand& op) {
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bool is_constant = op.IsConstant();
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MachineRepresentation rep =
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v8::internal::compiler::InstructionSequence::DefaultRepresentation();
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LocationOperand::LocationKind kind;
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int index;
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if (!is_constant) {
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const LocationOperand& loc_op = LocationOperand::cast(op);
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// Canonicalize FP location operand representations to kFloat64.
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if (IsFloatingPoint(loc_op.representation())) {
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rep = MachineRepresentation::kFloat64;
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}
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if (loc_op.IsAnyRegister()) {
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index = loc_op.register_code();
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} else {
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index = loc_op.index();
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}
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kind = loc_op.location_kind();
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} else {
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index = ConstantOperand::cast(op).virtual_register();
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kind = LocationOperand::REGISTER;
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}
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Key key = {is_constant, rep, kind, index};
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return key;
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}
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static Value ValueFor(const InstructionOperand& op) { return KeyFor(op); }
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static InstructionOperand FromKey(Key key) {
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if (key.is_constant) {
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return ConstantOperand(key.index);
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}
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return AllocatedOperand(key.kind, key.rep, key.index);
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}
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friend std::ostream& operator<<(std::ostream& os,
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const InterpreterState& is) {
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for (OperandMap::const_iterator it = is.values_.begin();
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it != is.values_.end(); ++it) {
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if (it != is.values_.begin()) os << " ";
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InstructionOperand source = FromKey(it->second);
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InstructionOperand destination = FromKey(it->first);
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MoveOperands mo(source, destination);
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PrintableMoveOperands pmo = {GetRegConfig(), &mo};
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os << pmo;
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}
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return os;
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}
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OperandMap values_;
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};
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// An abstract interpreter for moves, swaps and parallel moves.
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class MoveInterpreter : public GapResolver::Assembler {
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public:
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explicit MoveInterpreter(Zone* zone) : zone_(zone) {}
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void AssembleMove(InstructionOperand* source,
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InstructionOperand* destination) override {
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ParallelMove* moves = new (zone_) ParallelMove(zone_);
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moves->AddMove(*source, *destination);
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state_.ExecuteInParallel(moves);
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}
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void AssembleSwap(InstructionOperand* source,
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InstructionOperand* destination) override {
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ParallelMove* moves = new (zone_) ParallelMove(zone_);
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moves->AddMove(*source, *destination);
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moves->AddMove(*destination, *source);
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state_.ExecuteInParallel(moves);
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}
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void AssembleParallelMove(const ParallelMove* moves) {
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state_.ExecuteInParallel(moves);
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}
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InterpreterState state() const { return state_; }
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private:
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Zone* const zone_;
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InterpreterState state_;
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};
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class ParallelMoveCreator : public HandleAndZoneScope {
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public:
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ParallelMoveCreator() : rng_(CcTest::random_number_generator()) {}
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// Creates a ParallelMove with 'size' random MoveOperands. Note that illegal
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// moves will be rejected, so the actual number of MoveOperands may be less.
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ParallelMove* Create(int size) {
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ParallelMove* parallel_move = new (main_zone()) ParallelMove(main_zone());
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// Valid ParallelMoves can't have interfering destination ops.
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std::set<InstructionOperand, CompareOperandModuloType> destinations;
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// Valid ParallelMoves can't have interfering source ops of different reps.
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std::map<InstructionOperand, MachineRepresentation,
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CompareOperandModuloType>
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sources;
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for (int i = 0; i < size; ++i) {
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MachineRepresentation rep = RandomRepresentation();
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MoveOperands mo(CreateRandomOperand(true, rep),
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CreateRandomOperand(false, rep));
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if (mo.IsRedundant()) continue;
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const InstructionOperand& dst = mo.destination();
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bool reject = false;
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// On architectures where FP register aliasing is non-simple, update the
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// destinations set with the float equivalents of the operand and check
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// that all destinations are unique and do not alias each other.
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if (!kSimpleFPAliasing && mo.destination().IsFPLocationOperand()) {
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std::vector<InstructionOperand> fragments;
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GetCanonicalOperands(dst, &fragments);
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CHECK(!fragments.empty());
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for (size_t i = 0; i < fragments.size(); ++i) {
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if (destinations.find(fragments[i]) == destinations.end()) {
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destinations.insert(fragments[i]);
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} else {
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reject = true;
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break;
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}
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}
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// Update the sources map, and check that no FP source has multiple
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// representations.
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const InstructionOperand& src = mo.source();
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if (src.IsFPRegister()) {
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std::vector<InstructionOperand> fragments;
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MachineRepresentation src_rep =
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LocationOperand::cast(src).representation();
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GetCanonicalOperands(src, &fragments);
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CHECK(!fragments.empty());
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for (size_t i = 0; i < fragments.size(); ++i) {
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auto find_it = sources.find(fragments[i]);
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if (find_it != sources.end() && find_it->second != src_rep) {
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reject = true;
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break;
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}
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sources.insert(std::make_pair(fragments[i], src_rep));
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}
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}
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} else {
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if (destinations.find(dst) == destinations.end()) {
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destinations.insert(dst);
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} else {
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reject = true;
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}
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}
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if (!reject) {
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parallel_move->AddMove(mo.source(), mo.destination());
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}
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}
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return parallel_move;
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}
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// Creates a ParallelMove from a list of operand pairs. Even operands are
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// destinations, odd ones are sources.
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ParallelMove* Create(const std::vector<InstructionOperand>& operand_pairs) {
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ParallelMove* parallel_move = new (main_zone()) ParallelMove(main_zone());
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for (size_t i = 0; i < operand_pairs.size(); i += 2) {
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const InstructionOperand& dst = operand_pairs[i];
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const InstructionOperand& src = operand_pairs[i + 1];
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parallel_move->AddMove(src, dst);
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}
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return parallel_move;
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}
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private:
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MachineRepresentation RandomRepresentation() {
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int index = rng_->NextInt(6);
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switch (index) {
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case 0:
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return MachineRepresentation::kWord32;
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case 1:
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return MachineRepresentation::kWord64;
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case 2:
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return MachineRepresentation::kFloat32;
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case 3:
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return MachineRepresentation::kFloat64;
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case 4:
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return MachineRepresentation::kSimd128;
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case 5:
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return MachineRepresentation::kTagged;
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}
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UNREACHABLE();
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return MachineRepresentation::kNone;
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}
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const int kMaxIndex = 7;
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const int kMaxIndices = kMaxIndex + 1;
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// Non-FP slots shouldn't overlap FP slots.
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// FP slots with different representations shouldn't overlap.
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int GetValidSlotIndex(MachineRepresentation rep, int index) {
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DCHECK_GE(kMaxIndex, index);
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// The first group of slots are for non-FP values.
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if (!IsFloatingPoint(rep)) return index;
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// The next group are for float values.
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int base = kMaxIndices;
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if (rep == MachineRepresentation::kFloat32) return base + index;
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// Double values.
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base += kMaxIndices;
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if (rep == MachineRepresentation::kFloat64) return base + index * 2;
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// SIMD values
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base += kMaxIndices * 2;
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CHECK_EQ(MachineRepresentation::kSimd128, rep);
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return base + index * 4;
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}
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InstructionOperand CreateRandomOperand(bool is_source,
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MachineRepresentation rep) {
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auto conf = RegisterConfiguration::Turbofan();
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auto GetValidRegisterCode = [&conf](MachineRepresentation rep, int index) {
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switch (rep) {
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case MachineRepresentation::kFloat32:
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case MachineRepresentation::kFloat64:
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case MachineRepresentation::kSimd128:
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return conf->RegisterConfiguration::GetAllocatableDoubleCode(index);
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default:
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return conf->RegisterConfiguration::GetAllocatableGeneralCode(index);
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}
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UNREACHABLE();
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return static_cast<int>(Register::kCode_no_reg);
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};
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int index = rng_->NextInt(kMaxIndex);
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// destination can't be Constant.
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switch (rng_->NextInt(is_source ? 5 : 4)) {
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case 0:
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return AllocatedOperand(LocationOperand::STACK_SLOT, rep,
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GetValidSlotIndex(rep, index));
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case 1:
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return AllocatedOperand(LocationOperand::REGISTER, rep,
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GetValidRegisterCode(rep, index));
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case 2:
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return ExplicitOperand(LocationOperand::REGISTER, rep,
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GetValidRegisterCode(rep, 1));
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case 3:
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return ExplicitOperand(LocationOperand::STACK_SLOT, rep,
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GetValidSlotIndex(rep, index));
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case 4:
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return ConstantOperand(index);
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}
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UNREACHABLE();
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return InstructionOperand();
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}
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private:
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v8::base::RandomNumberGenerator* rng_;
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};
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void RunTest(ParallelMove* pm, Zone* zone) {
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// Note: The gap resolver modifies the ParallelMove, so interpret first.
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MoveInterpreter mi1(zone);
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mi1.AssembleParallelMove(pm);
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MoveInterpreter mi2(zone);
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GapResolver resolver(&mi2);
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resolver.Resolve(pm);
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CHECK_EQ(mi1.state(), mi2.state());
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}
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TEST(FuzzResolver) {
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ParallelMoveCreator pmc;
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for (int size = 0; size < 80; ++size) {
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for (int repeat = 0; repeat < 50; ++repeat) {
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RunTest(pmc.Create(size), pmc.main_zone());
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}
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}
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}
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} // namespace compiler
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} // namespace internal
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} // namespace v8
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