pierre.langlois f07d2cdd6a ARM64: [turbofan] Avoid zero-extension after a 32-bit load ... A load instruction will implicitely clear the top 32 bits when writing to a W register. This patch avoids generating a `mov` instruction to zero-extend the result in this case. For example, this occurs in the generated code for dispatching to the next bytecode in the interpreter: kind = BYTECODE_HANDLER name = LdaZero compiler = turbofan Instructions (size = 36) 0x32e64c60 0 add x19, x19, #0x1 (1) 0x32e64c64 4 ldrb w0, [x20, x19] 0x32e64c68 8 mov w0, w0 ^^^^^^^^^^ 0x32e64c6c 12 lsl x0, x0, #3 0x32e64c70 16 ldr x1, [x21, x0] 0x32e64c74 20 movz x0, #0x0 0x32e64c78 24 br x1 BUG= Review-Url: https://codereview.chromium.org/1950013003 Cr-Commit-Position: refs/heads/master@{#36038}		2016-05-04 18:35:56 +00:00
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instruction-selector-arm64-unittest.cc	ARM64: [turbofan] Avoid zero-extension after a 32-bit load	2016-05-04 18:35:56 +00:00