dd3234bcbb
Relaxed f32x4 and f64x2 min and max.
These instructions only guarantee results when the inputs are non nans,
and when the inputs are not 0s of opposite signs.
Drive-by rename of instruction codes to be Minps/Maxps/Minpd/Maxpd
since they map down exactly to a single instruction.
ia32 port of c3f346b7ac.
Bug: v8:12284
Change-Id: If64da551524ea8c304e1fa8f9cf4acbd54abfe5c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3251708
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/main@{#77780}
419 lines
16 KiB
C++
419 lines
16 KiB
C++
// Copyright 2021 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include <type_traits>
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#include "src/base/overflowing-math.h"
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#include "src/base/safe_conversions.h"
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#include "src/common/globals.h"
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#include "src/wasm/compilation-environment.h"
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#include "test/cctest/cctest.h"
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#include "test/cctest/wasm/wasm-run-utils.h"
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#include "test/cctest/wasm/wasm-simd-utils.h"
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#include "test/common/wasm/flag-utils.h"
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#include "test/common/wasm/wasm-macro-gen.h"
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namespace v8 {
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namespace internal {
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namespace wasm {
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namespace test_run_wasm_relaxed_simd {
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// Use this for experimental relaxed-simd opcodes.
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#define WASM_RELAXED_SIMD_TEST(name) \
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void RunWasm_##name##_Impl(TestExecutionTier execution_tier); \
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TEST(RunWasm_##name##_turbofan) { \
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if (!CpuFeatures::SupportsWasmSimd128()) return; \
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EXPERIMENTAL_FLAG_SCOPE(relaxed_simd); \
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RunWasm_##name##_Impl(TestExecutionTier::kTurbofan); \
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} \
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TEST(RunWasm_##name##_interpreter) { \
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EXPERIMENTAL_FLAG_SCOPE(relaxed_simd); \
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RunWasm_##name##_Impl(TestExecutionTier::kInterpreter); \
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} \
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void RunWasm_##name##_Impl(TestExecutionTier execution_tier)
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#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X || \
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V8_TARGET_ARCH_PPC64
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// Only used for qfma and qfms tests below.
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// FMOperation holds the params (a, b, c) for a Multiply-Add or
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// Multiply-Subtract operation, and the expected result if the operation was
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// fused, rounded only once for the entire operation, or unfused, rounded after
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// multiply and again after add/subtract.
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template <typename T>
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struct FMOperation {
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const T a;
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const T b;
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const T c;
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const T fused_result;
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const T unfused_result;
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};
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// large_n is large number that overflows T when multiplied by itself, this is a
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// useful constant to test fused/unfused behavior.
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template <typename T>
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constexpr T large_n = T(0);
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template <>
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constexpr double large_n<double> = 1e200;
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template <>
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constexpr float large_n<float> = 1e20;
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// Fused Multiply-Add performs a + b * c.
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template <typename T>
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static constexpr FMOperation<T> qfma_array[] = {
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{1.0f, 2.0f, 3.0f, 7.0f, 7.0f},
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// fused: a + b * c = -inf + (positive overflow) = -inf
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// unfused: a + b * c = -inf + inf = NaN
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{-std::numeric_limits<T>::infinity(), large_n<T>, large_n<T>,
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-std::numeric_limits<T>::infinity(), std::numeric_limits<T>::quiet_NaN()},
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// fused: a + b * c = inf + (negative overflow) = inf
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// unfused: a + b * c = inf + -inf = NaN
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{std::numeric_limits<T>::infinity(), -large_n<T>, large_n<T>,
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std::numeric_limits<T>::infinity(), std::numeric_limits<T>::quiet_NaN()},
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// NaN
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{std::numeric_limits<T>::quiet_NaN(), 2.0f, 3.0f,
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std::numeric_limits<T>::quiet_NaN(), std::numeric_limits<T>::quiet_NaN()},
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// -NaN
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{-std::numeric_limits<T>::quiet_NaN(), 2.0f, 3.0f,
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std::numeric_limits<T>::quiet_NaN(), std::numeric_limits<T>::quiet_NaN()}};
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template <typename T>
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static constexpr base::Vector<const FMOperation<T>> qfma_vector() {
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return base::ArrayVector(qfma_array<T>);
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}
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// Fused Multiply-Subtract performs a - b * c.
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template <typename T>
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static constexpr FMOperation<T> qfms_array[]{
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{1.0f, 2.0f, 3.0f, -5.0f, -5.0f},
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// fused: a - b * c = inf - (positive overflow) = inf
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// unfused: a - b * c = inf - inf = NaN
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{std::numeric_limits<T>::infinity(), large_n<T>, large_n<T>,
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std::numeric_limits<T>::infinity(), std::numeric_limits<T>::quiet_NaN()},
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// fused: a - b * c = -inf - (negative overflow) = -inf
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// unfused: a - b * c = -inf - -inf = NaN
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{-std::numeric_limits<T>::infinity(), -large_n<T>, large_n<T>,
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-std::numeric_limits<T>::infinity(), std::numeric_limits<T>::quiet_NaN()},
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// NaN
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{std::numeric_limits<T>::quiet_NaN(), 2.0f, 3.0f,
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std::numeric_limits<T>::quiet_NaN(), std::numeric_limits<T>::quiet_NaN()},
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// -NaN
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{-std::numeric_limits<T>::quiet_NaN(), 2.0f, 3.0f,
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std::numeric_limits<T>::quiet_NaN(), std::numeric_limits<T>::quiet_NaN()}};
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template <typename T>
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static constexpr base::Vector<const FMOperation<T>> qfms_vector() {
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return base::ArrayVector(qfms_array<T>);
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}
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// Fused results only when fma3 feature is enabled, and running on TurboFan or
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// Liftoff (which can fall back to TurboFan if FMA is not implemented).
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bool ExpectFused(TestExecutionTier tier) {
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#ifdef V8_TARGET_ARCH_X64
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return CpuFeatures::IsSupported(FMA3) &&
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(tier == TestExecutionTier::kTurbofan ||
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tier == TestExecutionTier::kLiftoff);
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#else
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return (tier == TestExecutionTier::kTurbofan ||
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tier == TestExecutionTier::kLiftoff);
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#endif
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}
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#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X ||
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// V8_TARGET_ARCH_PPC64
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#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X || \
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V8_TARGET_ARCH_PPC64
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WASM_RELAXED_SIMD_TEST(F32x4Qfma) {
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WasmRunner<int32_t, float, float, float> r(execution_tier);
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// Set up global to hold mask output.
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float* g = r.builder().AddGlobal<float>(kWasmS128);
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// Build fn to splat test values, perform compare op, and write the result.
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byte value1 = 0, value2 = 1, value3 = 2;
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BUILD(r,
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WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_QFMA(
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WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(value1)),
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WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(value2)),
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WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(value3)))),
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WASM_ONE);
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for (FMOperation<float> x : qfma_vector<float>()) {
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r.Call(x.a, x.b, x.c);
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float expected =
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ExpectFused(execution_tier) ? x.fused_result : x.unfused_result;
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for (int i = 0; i < 4; i++) {
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float actual = LANE(g, i);
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CheckFloatResult(x.a, x.b, expected, actual, true /* exact */);
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}
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}
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}
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WASM_RELAXED_SIMD_TEST(F32x4Qfms) {
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WasmRunner<int32_t, float, float, float> r(execution_tier);
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// Set up global to hold mask output.
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float* g = r.builder().AddGlobal<float>(kWasmS128);
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// Build fn to splat test values, perform compare op, and write the result.
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byte value1 = 0, value2 = 1, value3 = 2;
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BUILD(r,
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WASM_GLOBAL_SET(0, WASM_SIMD_F32x4_QFMS(
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WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(value1)),
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WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(value2)),
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WASM_SIMD_F32x4_SPLAT(WASM_LOCAL_GET(value3)))),
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WASM_ONE);
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for (FMOperation<float> x : qfms_vector<float>()) {
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r.Call(x.a, x.b, x.c);
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float expected =
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ExpectFused(execution_tier) ? x.fused_result : x.unfused_result;
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for (int i = 0; i < 4; i++) {
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float actual = LANE(g, i);
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CheckFloatResult(x.a, x.b, expected, actual, true /* exact */);
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}
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}
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}
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WASM_RELAXED_SIMD_TEST(F64x2Qfma) {
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WasmRunner<int32_t, double, double, double> r(execution_tier);
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// Set up global to hold mask output.
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double* g = r.builder().AddGlobal<double>(kWasmS128);
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// Build fn to splat test values, perform compare op, and write the result.
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byte value1 = 0, value2 = 1, value3 = 2;
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BUILD(r,
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WASM_GLOBAL_SET(0, WASM_SIMD_F64x2_QFMA(
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WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(value1)),
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WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(value2)),
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WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(value3)))),
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WASM_ONE);
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for (FMOperation<double> x : qfma_vector<double>()) {
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r.Call(x.a, x.b, x.c);
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double expected =
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ExpectFused(execution_tier) ? x.fused_result : x.unfused_result;
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for (int i = 0; i < 2; i++) {
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double actual = LANE(g, i);
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CheckDoubleResult(x.a, x.b, expected, actual, true /* exact */);
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}
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}
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}
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WASM_RELAXED_SIMD_TEST(F64x2Qfms) {
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WasmRunner<int32_t, double, double, double> r(execution_tier);
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// Set up global to hold mask output.
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double* g = r.builder().AddGlobal<double>(kWasmS128);
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// Build fn to splat test values, perform compare op, and write the result.
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byte value1 = 0, value2 = 1, value3 = 2;
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BUILD(r,
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WASM_GLOBAL_SET(0, WASM_SIMD_F64x2_QFMS(
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WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(value1)),
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WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(value2)),
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WASM_SIMD_F64x2_SPLAT(WASM_LOCAL_GET(value3)))),
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WASM_ONE);
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for (FMOperation<double> x : qfms_vector<double>()) {
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r.Call(x.a, x.b, x.c);
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double expected =
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ExpectFused(execution_tier) ? x.fused_result : x.unfused_result;
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for (int i = 0; i < 2; i++) {
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double actual = LANE(g, i);
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CheckDoubleResult(x.a, x.b, expected, actual, true /* exact */);
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}
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}
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}
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#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X ||
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// V8_TARGET_ARCH_PPC64
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WASM_RELAXED_SIMD_TEST(F32x4RecipApprox) {
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RunF32x4UnOpTest(execution_tier, kExprF32x4RecipApprox, base::Recip,
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false /* !exact */);
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}
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WASM_RELAXED_SIMD_TEST(F32x4RecipSqrtApprox) {
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RunF32x4UnOpTest(execution_tier, kExprF32x4RecipSqrtApprox, base::RecipSqrt,
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false /* !exact */);
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}
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#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32
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namespace {
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// Helper to convert an array of T into an array of uint8_t to be used a v128
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// constants.
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template <typename T, size_t N = kSimd128Size / sizeof(T)>
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std::array<uint8_t, kSimd128Size> as_uint8(const T* src) {
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std::array<uint8_t, kSimd128Size> arr;
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for (size_t i = 0; i < N; i++) {
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WriteLittleEndianValue<T>(bit_cast<T*>(&arr[0]) + i, src[i]);
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}
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return arr;
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}
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template <typename T, int kElems>
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void RelaxedLaneSelectTest(TestExecutionTier execution_tier, const T v1[kElems],
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const T v2[kElems], const T s[kElems],
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const T expected[kElems], WasmOpcode laneselect) {
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auto lhs = as_uint8<T>(v1);
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auto rhs = as_uint8<T>(v2);
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auto mask = as_uint8<T>(s);
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WasmRunner<int32_t> r(execution_tier);
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T* dst = r.builder().AddGlobal<T>(kWasmS128);
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BUILD(r,
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WASM_GLOBAL_SET(0, WASM_SIMD_OPN(laneselect, WASM_SIMD_CONSTANT(lhs),
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WASM_SIMD_CONSTANT(rhs),
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WASM_SIMD_CONSTANT(mask))),
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WASM_ONE);
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CHECK_EQ(1, r.Call());
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for (int i = 0; i < kElems; i++) {
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CHECK_EQ(expected[i], LANE(dst, i));
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}
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}
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} // namespace
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WASM_RELAXED_SIMD_TEST(I8x16RelaxedLaneSelect) {
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constexpr int kElems = 16;
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constexpr uint8_t v1[kElems] = {0, 1, 2, 3, 4, 5, 6, 7,
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8, 9, 10, 11, 12, 13, 14, 15};
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constexpr uint8_t v2[kElems] = {16, 17, 18, 19, 20, 21, 22, 23,
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24, 25, 26, 27, 28, 29, 30, 31};
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constexpr uint8_t s[kElems] = {0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF,
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0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF};
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constexpr uint8_t expected[kElems] = {16, 1, 18, 3, 20, 5, 22, 7,
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24, 9, 26, 11, 28, 13, 30, 15};
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RelaxedLaneSelectTest<uint8_t, kElems>(execution_tier, v1, v2, s, expected,
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kExprI8x16RelaxedLaneSelect);
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}
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WASM_RELAXED_SIMD_TEST(I16x8RelaxedLaneSelect) {
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constexpr int kElems = 8;
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uint16_t v1[kElems] = {0, 1, 2, 3, 4, 5, 6, 7};
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uint16_t v2[kElems] = {8, 9, 10, 11, 12, 13, 14, 15};
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uint16_t s[kElems] = {0, 0xFFFF, 0, 0xFFFF, 0, 0xFFFF, 0, 0xFFFF};
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constexpr uint16_t expected[kElems] = {8, 1, 10, 3, 12, 5, 14, 7};
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RelaxedLaneSelectTest<uint16_t, kElems>(execution_tier, v1, v2, s, expected,
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kExprI16x8RelaxedLaneSelect);
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}
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WASM_RELAXED_SIMD_TEST(I32x4RelaxedLaneSelect) {
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constexpr int kElems = 4;
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uint32_t v1[kElems] = {0, 1, 2, 3};
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uint32_t v2[kElems] = {4, 5, 6, 7};
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uint32_t s[kElems] = {0, 0xFFFF'FFFF, 0, 0xFFFF'FFFF};
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constexpr uint32_t expected[kElems] = {4, 1, 6, 3};
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RelaxedLaneSelectTest<uint32_t, kElems>(execution_tier, v1, v2, s, expected,
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kExprI32x4RelaxedLaneSelect);
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}
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WASM_RELAXED_SIMD_TEST(I64x2RelaxedLaneSelect) {
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constexpr int kElems = 2;
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uint64_t v1[kElems] = {0, 1};
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uint64_t v2[kElems] = {2, 3};
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uint64_t s[kElems] = {0, 0xFFFF'FFFF'FFFF'FFFF};
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constexpr uint64_t expected[kElems] = {2, 1};
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RelaxedLaneSelectTest<uint64_t, kElems>(execution_tier, v1, v2, s, expected,
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kExprI64x2RelaxedLaneSelect);
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}
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WASM_RELAXED_SIMD_TEST(F32x4RelaxedMin) {
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RunF32x4BinOpTest(execution_tier, kExprF32x4RelaxedMin, Minimum);
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}
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WASM_RELAXED_SIMD_TEST(F32x4RelaxedMax) {
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RunF32x4BinOpTest(execution_tier, kExprF32x4RelaxedMax, Maximum);
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}
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WASM_RELAXED_SIMD_TEST(F64x2RelaxedMin) {
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RunF64x2BinOpTest(execution_tier, kExprF64x2RelaxedMin, Minimum);
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}
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WASM_RELAXED_SIMD_TEST(F64x2RelaxedMax) {
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RunF64x2BinOpTest(execution_tier, kExprF64x2RelaxedMax, Maximum);
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}
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#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32
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#if V8_TARGET_ARCH_X64
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WASM_RELAXED_SIMD_TEST(I8x16RelaxedSwizzle) {
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// Output is only defined for indices in the range [0,15].
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WasmRunner<int32_t> r(execution_tier);
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static const int kElems = kSimd128Size / sizeof(uint8_t);
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uint8_t* dst = r.builder().AddGlobal<uint8_t>(kWasmS128);
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uint8_t* src = r.builder().AddGlobal<uint8_t>(kWasmS128);
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uint8_t* indices = r.builder().AddGlobal<uint8_t>(kWasmS128);
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BUILD(r,
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WASM_GLOBAL_SET(
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0, WASM_SIMD_BINOP(kExprI8x16RelaxedSwizzle, WASM_GLOBAL_GET(1),
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WASM_GLOBAL_GET(2))),
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WASM_ONE);
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for (int i = 0; i < kElems; i++) {
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LANE(src, i) = kElems - i - 1;
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LANE(indices, i) = kElems - i - 1;
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}
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CHECK_EQ(1, r.Call());
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for (int i = 0; i < kElems; i++) {
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CHECK_EQ(LANE(dst, i), i);
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}
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}
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namespace {
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// For relaxed trunc instructions, don't test out of range values.
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// FloatType comes later so caller can rely on template argument deduction and
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// just pass IntType.
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template <typename IntType, typename FloatType>
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typename std::enable_if<std::is_floating_point<FloatType>::value, bool>::type
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ShouldSkipTestingConstant(FloatType x) {
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return std::isnan(x) || !base::IsValueInRangeForNumericType<IntType>(x) ||
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!PlatformCanRepresent(x);
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}
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template <typename IntType, typename FloatType>
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void IntRelaxedTruncFloatTest(TestExecutionTier execution_tier,
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WasmOpcode trunc_op, WasmOpcode splat_op) {
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WasmRunner<int, FloatType> r(execution_tier);
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IntType* g0 = r.builder().template AddGlobal<IntType>(kWasmS128);
|
|
constexpr int lanes = kSimd128Size / sizeof(FloatType);
|
|
|
|
// global[0] = trunc(splat(local[0])).
|
|
BUILD(r,
|
|
WASM_GLOBAL_SET(
|
|
0, WASM_SIMD_UNOP(trunc_op,
|
|
WASM_SIMD_UNOP(splat_op, WASM_LOCAL_GET(0)))),
|
|
WASM_ONE);
|
|
|
|
for (FloatType x : compiler::ValueHelper::GetVector<FloatType>()) {
|
|
if (ShouldSkipTestingConstant<IntType>(x)) continue;
|
|
CHECK_EQ(1, r.Call(x));
|
|
IntType expected = base::checked_cast<IntType>(x);
|
|
for (int i = 0; i < lanes; i++) {
|
|
CHECK_EQ(expected, LANE(g0, i));
|
|
}
|
|
}
|
|
}
|
|
} // namespace
|
|
|
|
WASM_RELAXED_SIMD_TEST(I32x4RelaxedTruncF64x2SZero) {
|
|
IntRelaxedTruncFloatTest<int32_t, double>(
|
|
execution_tier, kExprI32x4RelaxedTruncF64x2SZero, kExprF64x2Splat);
|
|
}
|
|
|
|
WASM_RELAXED_SIMD_TEST(I32x4RelaxedTruncF64x2UZero) {
|
|
IntRelaxedTruncFloatTest<uint32_t, double>(
|
|
execution_tier, kExprI32x4RelaxedTruncF64x2UZero, kExprF64x2Splat);
|
|
}
|
|
|
|
WASM_RELAXED_SIMD_TEST(I32x4RelaxedTruncF32x4S) {
|
|
IntRelaxedTruncFloatTest<int32_t, float>(
|
|
execution_tier, kExprI32x4RelaxedTruncF32x4S, kExprF32x4Splat);
|
|
}
|
|
|
|
WASM_RELAXED_SIMD_TEST(I32x4RelaxedTruncF32x4U) {
|
|
IntRelaxedTruncFloatTest<uint32_t, float>(
|
|
execution_tier, kExprI32x4RelaxedTruncF32x4U, kExprF32x4Splat);
|
|
}
|
|
#endif // V8_TARGET_ARCH_X64
|
|
|
|
#undef WASM_RELAXED_SIMD_TEST
|
|
} // namespace test_run_wasm_relaxed_simd
|
|
} // namespace wasm
|
|
} // namespace internal
|
|
} // namespace v8
|