f9b39f29fb
BUG= R=bmeurer@chromium.org, dusan.milosavljevic@imgtec.com Review URL: https://codereview.chromium.org/601723002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24397 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
808 lines
28 KiB
C++
808 lines
28 KiB
C++
// Copyright 2014 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file
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#include "test/unittests/compiler/instruction-selector-unittest.h"
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namespace v8 {
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namespace internal {
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namespace compiler {
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namespace {
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template <typename T>
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struct MachInst {
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T constructor;
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const char* constructor_name;
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ArchOpcode arch_opcode;
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MachineType machine_type;
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};
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template <typename T>
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std::ostream& operator<<(std::ostream& os, const MachInst<T>& mi) {
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return os << mi.constructor_name;
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}
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typedef MachInst<Node* (RawMachineAssembler::*)(Node*)> MachInst1;
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typedef MachInst<Node* (RawMachineAssembler::*)(Node*, Node*)> MachInst2;
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// To avoid duplicated code IntCmp helper structure
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// is created. It contains MachInst2 with two nodes and expected_size
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// because different cmp instructions have different size.
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struct IntCmp {
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MachInst2 mi;
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uint32_t expected_size;
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};
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struct FPCmp {
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MachInst2 mi;
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FlagsCondition cond;
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};
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const FPCmp kFPCmpInstructions[] = {
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{{&RawMachineAssembler::Float64Equal, "Float64Equal", kMipsCmpD,
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kMachFloat64},
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kUnorderedEqual},
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{{&RawMachineAssembler::Float64LessThan, "Float64LessThan", kMipsCmpD,
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kMachFloat64},
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kUnorderedLessThan},
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{{&RawMachineAssembler::Float64LessThanOrEqual, "Float64LessThanOrEqual",
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kMipsCmpD, kMachFloat64},
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kUnorderedLessThanOrEqual},
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{{&RawMachineAssembler::Float64GreaterThan, "Float64GreaterThan", kMipsCmpD,
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kMachFloat64},
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kUnorderedLessThan},
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{{&RawMachineAssembler::Float64GreaterThanOrEqual,
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"Float64GreaterThanOrEqual", kMipsCmpD, kMachFloat64},
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kUnorderedLessThanOrEqual}};
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struct Conversion {
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// The machine_type field in MachInst1 represents the destination type.
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MachInst1 mi;
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MachineType src_machine_type;
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};
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// ----------------------------------------------------------------------------
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// Logical instructions.
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// ----------------------------------------------------------------------------
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const MachInst2 kLogicalInstructions[] = {
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{&RawMachineAssembler::WordAnd, "WordAnd", kMipsAnd, kMachInt16},
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{&RawMachineAssembler::WordOr, "WordOr", kMipsOr, kMachInt16},
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{&RawMachineAssembler::WordXor, "WordXor", kMipsXor, kMachInt16},
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{&RawMachineAssembler::Word32And, "Word32And", kMipsAnd, kMachInt32},
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{&RawMachineAssembler::Word32Or, "Word32Or", kMipsOr, kMachInt32},
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{&RawMachineAssembler::Word32Xor, "Word32Xor", kMipsXor, kMachInt32}};
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// ----------------------------------------------------------------------------
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// Shift instructions.
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// ----------------------------------------------------------------------------
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const MachInst2 kShiftInstructions[] = {
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{&RawMachineAssembler::WordShl, "WordShl", kMipsShl, kMachInt16},
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{&RawMachineAssembler::WordShr, "WordShr", kMipsShr, kMachInt16},
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{&RawMachineAssembler::WordSar, "WordSar", kMipsSar, kMachInt16},
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{&RawMachineAssembler::WordRor, "WordRor", kMipsRor, kMachInt16},
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{&RawMachineAssembler::Word32Shl, "Word32Shl", kMipsShl, kMachInt32},
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{&RawMachineAssembler::Word32Shr, "Word32Shr", kMipsShr, kMachInt32},
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{&RawMachineAssembler::Word32Sar, "Word32Sar", kMipsSar, kMachInt32},
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{&RawMachineAssembler::Word32Ror, "Word32Ror", kMipsRor, kMachInt32}};
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// ----------------------------------------------------------------------------
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// MUL/DIV instructions.
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// ----------------------------------------------------------------------------
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const MachInst2 kMulDivInstructions[] = {
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{&RawMachineAssembler::Int32Mul, "Int32Mul", kMipsMul, kMachInt32},
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{&RawMachineAssembler::Int32Div, "Int32Div", kMipsDiv, kMachInt32},
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{&RawMachineAssembler::Uint32Div, "Uint32Div", kMipsDivU, kMachUint32},
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{&RawMachineAssembler::Float64Mul, "Float64Mul", kMipsMulD, kMachFloat64},
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{&RawMachineAssembler::Float64Div, "Float64Div", kMipsDivD, kMachFloat64}};
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// ----------------------------------------------------------------------------
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// MOD instructions.
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// ----------------------------------------------------------------------------
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const MachInst2 kModInstructions[] = {
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{&RawMachineAssembler::Int32Mod, "Int32Mod", kMipsMod, kMachInt32},
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{&RawMachineAssembler::Uint32Mod, "Int32UMod", kMipsModU, kMachInt32},
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{&RawMachineAssembler::Float64Mod, "Float64Mod", kMipsModD, kMachFloat64}};
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// ----------------------------------------------------------------------------
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// Arithmetic FPU instructions.
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// ----------------------------------------------------------------------------
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const MachInst2 kFPArithInstructions[] = {
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{&RawMachineAssembler::Float64Add, "Float64Add", kMipsAddD, kMachFloat64},
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{&RawMachineAssembler::Float64Sub, "Float64Sub", kMipsSubD, kMachFloat64}};
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// ----------------------------------------------------------------------------
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// IntArithTest instructions, two nodes.
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// ----------------------------------------------------------------------------
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const MachInst2 kAddSubInstructions[] = {
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{&RawMachineAssembler::Int32Add, "Int32Add", kMipsAdd, kMachInt32},
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{&RawMachineAssembler::Int32Sub, "Int32Sub", kMipsSub, kMachInt32},
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{&RawMachineAssembler::Int32AddWithOverflow, "Int32AddWithOverflow",
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kMipsAddOvf, kMachInt32},
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{&RawMachineAssembler::Int32SubWithOverflow, "Int32SubWithOverflow",
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kMipsSubOvf, kMachInt32}};
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// ----------------------------------------------------------------------------
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// IntArithTest instructions, one node.
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// ----------------------------------------------------------------------------
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const MachInst1 kAddSubOneInstructions[] = {
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{&RawMachineAssembler::Int32Neg, "Int32Neg", kMipsSub, kMachInt32},
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// TODO(dusmil): check this ...
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// {&RawMachineAssembler::WordEqual , "WordEqual" , kMipsTst, kMachInt32}
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};
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// ----------------------------------------------------------------------------
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// Arithmetic compare instructions.
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// ----------------------------------------------------------------------------
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const IntCmp kCmpInstructions[] = {
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{{&RawMachineAssembler::WordEqual, "WordEqual", kMipsCmp, kMachInt16}, 1U},
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{{&RawMachineAssembler::WordNotEqual, "WordNotEqual", kMipsCmp, kMachInt16},
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2U},
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{{&RawMachineAssembler::Word32Equal, "Word32Equal", kMipsCmp, kMachInt32},
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1U},
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{{&RawMachineAssembler::Word32NotEqual, "Word32NotEqual", kMipsCmp,
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kMachInt32},
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2U},
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{{&RawMachineAssembler::Int32LessThan, "Int32LessThan", kMipsCmp,
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kMachInt32},
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1U},
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{{&RawMachineAssembler::Int32LessThanOrEqual, "Int32LessThanOrEqual",
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kMipsCmp, kMachInt32},
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1U},
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{{&RawMachineAssembler::Int32GreaterThan, "Int32GreaterThan", kMipsCmp,
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kMachInt32},
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1U},
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{{&RawMachineAssembler::Int32GreaterThanOrEqual, "Int32GreaterThanOrEqual",
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kMipsCmp, kMachInt32},
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1U},
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{{&RawMachineAssembler::Uint32LessThan, "Uint32LessThan", kMipsCmp,
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kMachUint32},
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1U},
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{{&RawMachineAssembler::Uint32LessThanOrEqual, "Uint32LessThanOrEqual",
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kMipsCmp, kMachUint32},
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1U}};
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// ----------------------------------------------------------------------------
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// Conversion instructions.
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// ----------------------------------------------------------------------------
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const Conversion kConversionInstructions[] = {
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// Conversion instructions are related to machine_operator.h:
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// FPU conversions:
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// Convert representation of integers between float64 and int32/uint32.
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// The precise rounding mode and handling of out of range inputs are *not*
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// defined for these operators, since they are intended only for use with
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// integers.
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// mips instruction: cvt_d_w
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{{&RawMachineAssembler::ChangeInt32ToFloat64, "ChangeInt32ToFloat64",
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kMipsCvtDW, kMachFloat64},
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kMachInt32},
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// mips instruction: cvt_d_uw
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{{&RawMachineAssembler::ChangeUint32ToFloat64, "ChangeUint32ToFloat64",
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kMipsCvtDUw, kMachFloat64},
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kMachInt32},
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// mips instruction: trunc_w_d
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{{&RawMachineAssembler::ChangeFloat64ToInt32, "ChangeFloat64ToInt32",
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kMipsTruncWD, kMachFloat64},
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kMachInt32},
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// mips instruction: trunc_uw_d
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{{&RawMachineAssembler::ChangeFloat64ToUint32, "ChangeFloat64ToUint32",
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kMipsTruncUwD, kMachFloat64},
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kMachInt32}};
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} // namespace
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typedef InstructionSelectorTestWithParam<FPCmp> InstructionSelectorFPCmpTest;
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TEST_P(InstructionSelectorFPCmpTest, Parameter) {
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const FPCmp cmp = GetParam();
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StreamBuilder m(this, kMachInt32, cmp.mi.machine_type, cmp.mi.machine_type);
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m.Return((m.*cmp.mi.constructor)(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(cmp.mi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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EXPECT_EQ(kFlags_set, s[0]->flags_mode());
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EXPECT_EQ(cmp.cond, s[0]->flags_condition());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorFPCmpTest,
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::testing::ValuesIn(kFPCmpInstructions));
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// ----------------------------------------------------------------------------
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// Arithmetic compare instructions integers.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<IntCmp> InstructionSelectorCmpTest;
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TEST_P(InstructionSelectorCmpTest, Parameter) {
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const IntCmp cmp = GetParam();
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const MachineType type = cmp.mi.machine_type;
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StreamBuilder m(this, type, type, type);
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m.Return((m.*cmp.mi.constructor)(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(cmp.expected_size, s.size());
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EXPECT_EQ(cmp.mi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorCmpTest,
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::testing::ValuesIn(kCmpInstructions));
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// ----------------------------------------------------------------------------
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// Shift instructions.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MachInst2>
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InstructionSelectorShiftTest;
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TEST_P(InstructionSelectorShiftTest, Immediate) {
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const MachInst2 dpi = GetParam();
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const MachineType type = dpi.machine_type;
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TRACED_FORRANGE(int32_t, imm, 0, (ElementSizeOf(type) * 8) - 1) {
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StreamBuilder m(this, type, type);
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m.Return((m.*dpi.constructor)(m.Parameter(0), m.Int32Constant(imm)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
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EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorShiftTest,
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::testing::ValuesIn(kShiftInstructions));
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// ----------------------------------------------------------------------------
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// Logical instructions.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MachInst2>
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InstructionSelectorLogicalTest;
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TEST_P(InstructionSelectorLogicalTest, Parameter) {
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const MachInst2 dpi = GetParam();
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const MachineType type = dpi.machine_type;
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StreamBuilder m(this, type, type, type);
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m.Return((m.*dpi.constructor)(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorLogicalTest,
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::testing::ValuesIn(kLogicalInstructions));
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// ----------------------------------------------------------------------------
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// MUL/DIV instructions.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MachInst2>
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InstructionSelectorMulDivTest;
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TEST_P(InstructionSelectorMulDivTest, Parameter) {
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const MachInst2 dpi = GetParam();
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const MachineType type = dpi.machine_type;
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StreamBuilder m(this, type, type, type);
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m.Return((m.*dpi.constructor)(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorMulDivTest,
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::testing::ValuesIn(kMulDivInstructions));
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// ----------------------------------------------------------------------------
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// MOD instructions.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MachInst2> InstructionSelectorModTest;
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TEST_P(InstructionSelectorModTest, Parameter) {
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const MachInst2 dpi = GetParam();
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const MachineType type = dpi.machine_type;
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StreamBuilder m(this, type, type, type);
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m.Return((m.*dpi.constructor)(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorModTest,
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::testing::ValuesIn(kModInstructions));
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// ----------------------------------------------------------------------------
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// Floating point instructions.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MachInst2>
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InstructionSelectorFPArithTest;
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TEST_P(InstructionSelectorFPArithTest, Parameter) {
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const MachInst2 fpa = GetParam();
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StreamBuilder m(this, fpa.machine_type, fpa.machine_type, fpa.machine_type);
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m.Return((m.*fpa.constructor)(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(fpa.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorFPArithTest,
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::testing::ValuesIn(kFPArithInstructions));
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// ----------------------------------------------------------------------------
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// Integer arithmetic.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MachInst2>
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InstructionSelectorIntArithTwoTest;
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TEST_P(InstructionSelectorIntArithTwoTest, Parameter) {
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const MachInst2 intpa = GetParam();
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StreamBuilder m(this, intpa.machine_type, intpa.machine_type,
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intpa.machine_type);
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m.Return((m.*intpa.constructor)(m.Parameter(0), m.Parameter(1)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(intpa.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
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InstructionSelectorIntArithTwoTest,
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::testing::ValuesIn(kAddSubInstructions));
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// ----------------------------------------------------------------------------
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// One node.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MachInst1>
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InstructionSelectorIntArithOneTest;
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TEST_P(InstructionSelectorIntArithOneTest, Parameter) {
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const MachInst1 intpa = GetParam();
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StreamBuilder m(this, intpa.machine_type, intpa.machine_type,
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intpa.machine_type);
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m.Return((m.*intpa.constructor)(m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(intpa.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
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InstructionSelectorIntArithOneTest,
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::testing::ValuesIn(kAddSubOneInstructions));
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// ----------------------------------------------------------------------------
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// Conversions.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<Conversion>
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InstructionSelectorConversionTest;
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TEST_P(InstructionSelectorConversionTest, Parameter) {
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const Conversion conv = GetParam();
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StreamBuilder m(this, conv.mi.machine_type, conv.src_machine_type);
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m.Return((m.*conv.mi.constructor)(m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(conv.mi.arch_opcode, s[0]->arch_opcode());
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EXPECT_EQ(1U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
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InstructionSelectorConversionTest,
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::testing::ValuesIn(kConversionInstructions));
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// ----------------------------------------------------------------------------
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// Loads and stores.
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// ----------------------------------------------------------------------------
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namespace {
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struct MemoryAccess {
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MachineType type;
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ArchOpcode load_opcode;
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ArchOpcode store_opcode;
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};
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static const MemoryAccess kMemoryAccesses[] = {
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{kMachInt8, kMipsLb, kMipsSb},
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{kMachUint8, kMipsLbu, kMipsSb},
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{kMachInt16, kMipsLh, kMipsSh},
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{kMachUint16, kMipsLhu, kMipsSh},
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{kMachInt32, kMipsLw, kMipsSw},
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{kRepFloat32, kMipsLwc1, kMipsSwc1},
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{kRepFloat64, kMipsLdc1, kMipsSdc1}};
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struct MemoryAccessImm {
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MachineType type;
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ArchOpcode load_opcode;
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ArchOpcode store_opcode;
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bool (InstructionSelectorTest::Stream::*val_predicate)(
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const InstructionOperand*) const;
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const int32_t immediates[40];
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};
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std::ostream& operator<<(std::ostream& os, const MemoryAccessImm& acc) {
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return os << acc.type;
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}
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struct MemoryAccessImm1 {
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MachineType type;
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ArchOpcode load_opcode;
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ArchOpcode store_opcode;
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bool (InstructionSelectorTest::Stream::*val_predicate)(
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const InstructionOperand*) const;
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const int32_t immediates[5];
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};
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std::ostream& operator<<(std::ostream& os, const MemoryAccessImm1& acc) {
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return os << acc.type;
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}
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// ----------------------------------------------------------------------------
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// Loads and stores immediate values.
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// ----------------------------------------------------------------------------
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const MemoryAccessImm kMemoryAccessesImm[] = {
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{kMachInt8,
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kMipsLb,
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kMipsSb,
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&InstructionSelectorTest::Stream::IsInteger,
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{-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
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-87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
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115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
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{kMachUint8,
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kMipsLbu,
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kMipsSb,
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&InstructionSelectorTest::Stream::IsInteger,
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{-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
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-87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
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115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
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{kMachInt16,
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kMipsLh,
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kMipsSh,
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&InstructionSelectorTest::Stream::IsInteger,
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{-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
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-87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
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115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
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{kMachUint16,
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kMipsLhu,
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kMipsSh,
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&InstructionSelectorTest::Stream::IsInteger,
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{-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
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-87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
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115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
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{kMachInt32,
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kMipsLw,
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kMipsSw,
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&InstructionSelectorTest::Stream::IsInteger,
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{-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
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-87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
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115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
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{kMachFloat32,
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kMipsLwc1,
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kMipsSwc1,
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&InstructionSelectorTest::Stream::IsDouble,
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{-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
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-87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
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115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
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{kMachFloat64,
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kMipsLdc1,
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kMipsSdc1,
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&InstructionSelectorTest::Stream::IsDouble,
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{-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
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-87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
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115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}};
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const MemoryAccessImm1 kMemoryAccessImmMoreThan16bit[] = {
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{kMachInt8,
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kMipsLb,
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kMipsSb,
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&InstructionSelectorTest::Stream::IsInteger,
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{-65000, -55000, 32777, 55000, 65000}},
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{kMachInt8,
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kMipsLbu,
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kMipsSb,
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&InstructionSelectorTest::Stream::IsInteger,
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{-65000, -55000, 32777, 55000, 65000}},
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{kMachInt16,
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kMipsLh,
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kMipsSh,
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&InstructionSelectorTest::Stream::IsInteger,
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{-65000, -55000, 32777, 55000, 65000}},
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{kMachInt16,
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kMipsLhu,
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kMipsSh,
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&InstructionSelectorTest::Stream::IsInteger,
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{-65000, -55000, 32777, 55000, 65000}},
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{kMachInt32,
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kMipsLw,
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kMipsSw,
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&InstructionSelectorTest::Stream::IsInteger,
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{-65000, -55000, 32777, 55000, 65000}},
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{kMachFloat32,
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kMipsLwc1,
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kMipsSwc1,
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&InstructionSelectorTest::Stream::IsDouble,
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{-65000, -55000, 32777, 55000, 65000}},
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{kMachFloat64,
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kMipsLdc1,
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kMipsSdc1,
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&InstructionSelectorTest::Stream::IsDouble,
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{-65000, -55000, 32777, 55000, 65000}}};
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} // namespace
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typedef InstructionSelectorTestWithParam<MemoryAccess>
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InstructionSelectorMemoryAccessTest;
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TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
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const MemoryAccess memacc = GetParam();
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StreamBuilder m(this, memacc.type, kMachPtr, kMachInt32);
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m.Return(m.Load(memacc.type, m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
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EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
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}
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TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
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const MemoryAccess memacc = GetParam();
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StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
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m.Store(memacc.type, m.Parameter(0), m.Parameter(1));
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m.Return(m.Int32Constant(0));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
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EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
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InstructionSelectorMemoryAccessTest,
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::testing::ValuesIn(kMemoryAccesses));
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// ----------------------------------------------------------------------------
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// Load immediate.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MemoryAccessImm>
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InstructionSelectorMemoryAccessImmTest;
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TEST_P(InstructionSelectorMemoryAccessImmTest, LoadWithImmediateIndex) {
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const MemoryAccessImm memacc = GetParam();
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TRACED_FOREACH(int32_t, index, memacc.immediates) {
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StreamBuilder m(this, memacc.type, kMachPtr);
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m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
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EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
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ASSERT_EQ(2U, s[0]->InputCount());
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ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
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EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
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ASSERT_EQ(1U, s[0]->OutputCount());
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EXPECT_TRUE((s.*memacc.val_predicate)(s[0]->Output()));
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}
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}
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// ----------------------------------------------------------------------------
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// Store immediate.
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// ----------------------------------------------------------------------------
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TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) {
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const MemoryAccessImm memacc = GetParam();
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TRACED_FOREACH(int32_t, index, memacc.immediates) {
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StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
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m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index),
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m.Parameter(1));
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m.Return(m.Int32Constant(0));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
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EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
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ASSERT_EQ(3U, s[0]->InputCount());
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ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
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EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
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EXPECT_EQ(0U, s[0]->OutputCount());
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}
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
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InstructionSelectorMemoryAccessImmTest,
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::testing::ValuesIn(kMemoryAccessesImm));
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// ----------------------------------------------------------------------------
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// Load/store offsets more than 16 bits.
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// ----------------------------------------------------------------------------
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typedef InstructionSelectorTestWithParam<MemoryAccessImm1>
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InstructionSelectorMemoryAccessImmMoreThan16bitTest;
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TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
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LoadWithImmediateIndex) {
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const MemoryAccessImm1 memacc = GetParam();
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TRACED_FOREACH(int32_t, index, memacc.immediates) {
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StreamBuilder m(this, memacc.type, kMachPtr);
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m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
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Stream s = m.Build();
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ASSERT_EQ(2U, s.size());
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// kMipsAdd is expected opcode.
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// size more than 16 bits wide.
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EXPECT_EQ(kMipsAdd, s[0]->arch_opcode());
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EXPECT_EQ(kMode_None, s[0]->addressing_mode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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}
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TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
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StoreWithImmediateIndex) {
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const MemoryAccessImm1 memacc = GetParam();
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TRACED_FOREACH(int32_t, index, memacc.immediates) {
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StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
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m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index),
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m.Parameter(1));
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m.Return(m.Int32Constant(0));
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Stream s = m.Build();
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ASSERT_EQ(2U, s.size());
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// kMipsAdd is expected opcode
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// size more than 16 bits wide
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EXPECT_EQ(kMipsAdd, s[0]->arch_opcode());
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EXPECT_EQ(kMode_None, s[0]->addressing_mode());
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EXPECT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(1U, s[0]->OutputCount());
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}
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}
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INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
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InstructionSelectorMemoryAccessImmMoreThan16bitTest,
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::testing::ValuesIn(kMemoryAccessImmMoreThan16bit));
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// ----------------------------------------------------------------------------
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// kMipsTst testing.
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// ----------------------------------------------------------------------------
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TEST_F(InstructionSelectorTest, Word32EqualWithZero) {
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{
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StreamBuilder m(this, kMachInt32, kMachInt32);
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m.Return(m.Word32Equal(m.Parameter(0), m.Int32Constant(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kMipsTst, s[0]->arch_opcode());
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EXPECT_EQ(kMode_None, s[0]->addressing_mode());
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ASSERT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(s.ToVreg(s[0]->InputAt(0)), s.ToVreg(s[0]->InputAt(1)));
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EXPECT_EQ(1U, s[0]->OutputCount());
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EXPECT_EQ(kFlags_set, s[0]->flags_mode());
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EXPECT_EQ(kEqual, s[0]->flags_condition());
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}
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{
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StreamBuilder m(this, kMachInt32, kMachInt32);
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m.Return(m.Word32Equal(m.Int32Constant(0), m.Parameter(0)));
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Stream s = m.Build();
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ASSERT_EQ(1U, s.size());
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EXPECT_EQ(kMipsTst, s[0]->arch_opcode());
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EXPECT_EQ(kMode_None, s[0]->addressing_mode());
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ASSERT_EQ(2U, s[0]->InputCount());
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EXPECT_EQ(s.ToVreg(s[0]->InputAt(0)), s.ToVreg(s[0]->InputAt(1)));
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EXPECT_EQ(1U, s[0]->OutputCount());
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EXPECT_EQ(kFlags_set, s[0]->flags_mode());
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EXPECT_EQ(kEqual, s[0]->flags_condition());
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}
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}
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} // namespace compiler
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} // namespace internal
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} // namespace v8
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