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Update OpenVMS compile support

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git-svn-id: https://svn.wxwidgets.org/svn/wx/wxWidgets/trunk@76250 c3d73ce0-8a6f-49c7-b76d-6d57e0e08775
This commit is contained in:
Jouk Jansen 2014-04-01 09:02:42 +00:00
parent 225daa32d7
commit cb9a769aad
1 changed files with 4 additions and 3 deletions
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7
src/stc/scintilla/lexers/descrip.mms
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@ -2,7 +2,7 @@
# * # *
# Make file for VMS * # Make file for VMS *
# Author : J.Jansen (joukj@hrem.nano.tudelft.nl) * # Author : J.Jansen (joukj@hrem.nano.tudelft.nl) *
# Date : 24 August 2012 * # Date : 1 April 2014 *
# * # *
#***************************************************************************** #*****************************************************************************
@ -72,7 +72,7 @@ OBJECTS1=LexMMIXAL.obj,LexModula.obj,LexMPT.obj,LexMSSQL.obj,LexMySQL.obj,\
LexScriptol.obj,LexSmalltalk.obj,LexSML.obj,LexSorcus.obj,LexSpecman.obj,\ LexScriptol.obj,LexSmalltalk.obj,LexSML.obj,LexSorcus.obj,LexSpecman.obj,\
LexSpice.obj,LexSQL.obj,LexSTTXT.obj,LexTACL.obj,LexTADS3.obj,LexTAL.obj,\ LexSpice.obj,LexSQL.obj,LexSTTXT.obj,LexTACL.obj,LexTADS3.obj,LexTAL.obj,\
LexTCL.obj,LexTCMD.obj,LexTeX.obj,LexTxt2tags.obj,LexVB.obj,\ LexTCL.obj,LexTCMD.obj,LexTeX.obj,LexTxt2tags.obj,LexVB.obj,\
LexVerilog.obj,LexVHDL.obj,LexVisualProlog.obj,LexYAML.obj LexVerilog.obj,LexVHDL.obj,LexVisualProlog.obj,LexYAML.obj,LexDMAP.obj
SOURCES=LexA68k.cxx,LexAbaqus.cxx,LexAda.cxx,LexAPDL.cxx,LexAsm.cxx,\ SOURCES=LexA68k.cxx,LexAbaqus.cxx,LexAda.cxx,LexAPDL.cxx,LexAsm.cxx,\
LexAsn1.cxx,LexASY.cxx,LexAU3.cxx,LexAVE.cxx,LexAVS.cxx,LexBaan.cxx,\ LexAsn1.cxx,LexASY.cxx,LexAU3.cxx,LexAVE.cxx,LexAVS.cxx,LexBaan.cxx,\
@ -92,7 +92,7 @@ SOURCES=LexA68k.cxx,LexAbaqus.cxx,LexAda.cxx,LexAPDL.cxx,LexAsm.cxx,\
LexScriptol.cxx,LexSmalltalk.cxx,LexSML.cxx,LexSorcus.cxx,LexSpecman.cxx,\ LexScriptol.cxx,LexSmalltalk.cxx,LexSML.cxx,LexSorcus.cxx,LexSpecman.cxx,\
LexSpice.cxx,LexSQL.cxx,LexSTTXT.cxx,LexTACL.cxx,LexTADS3.cxx,LexTAL.cxx,\ LexSpice.cxx,LexSQL.cxx,LexSTTXT.cxx,LexTACL.cxx,LexTADS3.cxx,LexTAL.cxx,\
LexTCL.cxx,LexTCMD.cxx,LexTeX.cxx,LexTxt2tags.cxx,LexVB.cxx,\ LexTCL.cxx,LexTCMD.cxx,LexTeX.cxx,LexTxt2tags.cxx,LexVB.cxx,\
LexVerilog.cxx,LexVHDL.cxx,LexVisualProlog.cxx,LexYAML.cxx LexVerilog.cxx,LexVHDL.cxx,LexVisualProlog.cxx,LexYAML.cxx,LexDMAP.cxx
all : $(SOURCES) all : $(SOURCES)
$(MMS)$(MMSQUALIFIERS) $(OBJECTS) $(MMS)$(MMSQUALIFIERS) $(OBJECTS)
@ -217,3 +217,4 @@ LexVerilog.obj : LexVerilog.cxx
LexVHDL.obj : LexVHDL.cxx LexVHDL.obj : LexVHDL.cxx
LexVisualProlog.obj : LexVisualProlog.cxx LexVisualProlog.obj : LexVisualProlog.cxx
LexYAML.obj : LexYAML.cxx LexYAML.obj : LexYAML.cxx
LexDMAP.obj : LexDMAP.cxx