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@ -141,8 +141,12 @@ MEM_STATIC unsigned BIT_highbit32 (U32 val)
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assert(val != 0);
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{
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# if defined(_MSC_VER) /* Visual */
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unsigned long r=0;
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return _BitScanReverse ( &r, val ) ? (unsigned)r : 0;
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# if STATIC_BMI2 == 1
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return _lzcnt_u32(val) ^ 31;
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# else
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unsigned long r = 0;
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return _BitScanReverse(&r, val) ? (unsigned)r : 0;
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# endif
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# elif defined(__GNUC__) && (__GNUC__ >= 3) /* Use GCC Intrinsic */
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return __builtin_clz (val) ^ 31;
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# elif defined(__ICCARM__) /* IAR Intrinsic */
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@ -324,16 +328,24 @@ MEM_STATIC size_t BIT_getUpperBits(size_t bitContainer, U32 const start)
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MEM_STATIC size_t BIT_getMiddleBits(size_t bitContainer, U32 const start, U32 const nbBits)
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{
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#if STATIC_BMI2
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return _bextr_u64(bitContainer, start, nbBits);
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#else
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U32 const regMask = sizeof(bitContainer)*8 - 1;
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/* if start > regMask, bitstream is corrupted, and result is undefined */
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assert(nbBits < BIT_MASK_SIZE);
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return (bitContainer >> (start & regMask)) & BIT_mask[nbBits];
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#endif
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}
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MEM_STATIC size_t BIT_getLowerBits(size_t bitContainer, U32 const nbBits)
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{
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#if STATIC_BMI2
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return _bzhi_u64(bitContainer, nbBits);
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#else
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assert(nbBits < BIT_MASK_SIZE);
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return bitContainer & BIT_mask[nbBits];
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#endif
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}
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/*! BIT_lookBits() :
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@ -183,4 +183,17 @@
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# pragma warning(disable : 4324) /* disable: C4324: padded structure */
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#endif
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/*Like DYNAMIC_BMI2 but for compile time determination of BMI2 support*/
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#ifndef STATIC_BMI2
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# if defined(_MSC_VER) && (defined(_M_X64) || defined(_M_I86))
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# ifdef __AVX2__ //MSVC does not have a BMI2 specific flag, but every CPU that supports AVX2 also supports BMI2
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# define STATIC_BMI2 1
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# endif
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# endif
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#endif
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#ifndef STATIC_BMI2
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#define STATIC_BMI2 0
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#endif
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#endif /* ZSTD_COMPILER_H */
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@ -394,8 +394,12 @@ MEM_STATIC U32 ZSTD_highbit32(U32 val) /* compress, dictBuilder, decodeCorpus
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assert(val != 0);
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{
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# if defined(_MSC_VER) /* Visual */
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unsigned long r=0;
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return _BitScanReverse(&r, val) ? (unsigned)r : 0;
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# if STATIC_BMI2 == 1
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return _lzcnt_u32(val)^31;
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# else
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unsigned long r=0;
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return _BitScanReverse(&r, val) ? (unsigned)r : 0;
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# endif
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# elif defined(__GNUC__) && (__GNUC__ >= 3) /* GCC Intrinsic */
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return __builtin_clz (val) ^ 31;
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# elif defined(__ICCARM__) /* IAR Intrinsic */
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