[*] Adopt new ROXTL atomics
...AuAtomicLoad + AuAtomicClearU8Lock
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@ -100,7 +100,7 @@ namespace Aurora::Threading::Waitables
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AuUInt32 uWaitCount {};
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AuUInt32 uWaiters {};
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uWaiters = this->uAtomicSleeping;
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uWaiters = AuAtomicLoad(&this->uAtomicSleeping);
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if (uWaiters > 0)
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{
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AuAtomicAdd(&this->uAtomicState, 1u);
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@ -124,7 +124,7 @@ namespace Aurora::Threading::Waitables
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AuUInt32 uWaitCount {};
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AuUInt32 uWaiters {};
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uWaiters = this->uAtomicSleeping;
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uWaiters = AuAtomicLoad(&this->uAtomicSleeping);
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if (uWaiters > 0)
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{
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AuAtomicAdd(&this->uAtomicState, uWaiters);
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@ -149,7 +149,7 @@ namespace Aurora::Threading::Waitables
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AuUInt32 uWaitCount {};
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AuUInt32 uWaiters {};
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uWaiters = this->uAtomicSleeping;
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uWaiters = AuAtomicLoad(&this->uAtomicSleeping);
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if (uWaiters > 0)
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{
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auto uMin = AuMin(uWaiters, uThreads);
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@ -176,7 +176,7 @@ namespace Aurora::Threading::Waitables
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auline bool TryLock3()
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{
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auto old = this->uAtomicState;
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auto old = AuAtomicLoad(&this->uAtomicState);
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return ((old != 0 && AuAtomicCompareExchange(&this->uAtomicState, old - 1, old) == old));
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}
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@ -78,7 +78,7 @@ namespace Aurora::Threading::Waitables
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{
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AuAtomicAdd(&this->uAtomicState, AuUInt32(uThreads));
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if (auto uSleeping = this->uAtomicSleeping)
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if (auto uSleeping = AuAtomicLoad(&this->uAtomicSleeping))
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{
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WakeNOnAddress((const void *)&this->uAtomicState, uSleeping);
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}
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@ -68,13 +68,9 @@ namespace Aurora::Threading::Waitables
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inline void Unlock() override
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{
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#if defined(AURORA_COMPILER_MSVC)
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this->uAtomicState = 0;
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#else
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__sync_lock_release(&this->uAtomicState);
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#endif
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AuAtomicClearU8Lock(&this->uAtomicState);
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if (auto uSleeping = this->uAtomicSleeping)
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if (auto uSleeping = AuAtomicLoad(&this->uAtomicSleeping))
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{
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WakeOnAddress((const void *)&this->uAtomicState);
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}
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@ -117,7 +117,7 @@ namespace Aurora::Threading::Primitives
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AuUInt32 uWaitCount {};
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AuUInt32 uWaiters {};
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uWaiters = this->uWaiters_;
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uWaiters = AuAtomicLoad(&this->uWaiters_);
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if (uWaiters > 0)
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{
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this->s_.Unlock();
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@ -141,7 +141,7 @@ namespace Aurora::Threading::Primitives
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AuUInt32 uWaitCount {};
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AuUInt32 uWaiters {};
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uWaiters = this->uWaiters_;
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uWaiters = AuAtomicLoad(&this->uWaiters_);
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if (uWaiters > 0)
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{
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this->s_.Unlock(uWaiters);
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@ -14,9 +14,6 @@
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namespace Aurora::Threading::Primitives
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{
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#define barrier() __asm__ __volatile__("sfence": : :"memory")
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#define compilerReorderBarrier() __asm__ __volatile__("": : :"memory")
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LinuxConditionMutex::LinuxConditionMutex()
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{
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@ -188,9 +185,8 @@ namespace Aurora::Threading::Primitives
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void LinuxConditionMutex::Unlock()
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{
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__sync_lock_release(&this->uState_);
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compilerReorderBarrier();
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if (this->uSleeping_)
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AuAtomicClearU8Lock(&this->uState_);
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if (AuAtomicLoad(&this->uSleeping_))
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{
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futex_wake(&this->uState_, 1);
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}
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@ -118,15 +118,7 @@ namespace Aurora::Threading::Primitives
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auto &uValueRef = this->lock_.uWaitCount;
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#if defined(AURORA_COMPILER_MSVC)
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#if defined(AURORA_ARCH_X86) || defined(AURORA_ARCH_X64)
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*(AuUInt8 *)&uValueRef = 0;
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#else
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InterlockedAndRelease((volatile LONG *)&uValueRef, ~0xFF);
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#endif
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#else
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__sync_lock_release((AuUInt8 *)&uValueRef);
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#endif
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AuAtomicClearU8Lock(&uValueRef);
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while (true)
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{
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@ -138,7 +138,7 @@ namespace Aurora::Threading::Primitives
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AuUInt32 uWaitCount {};
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AuUInt32 uWaiters {};
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uWaiters = this->uSleeping_;
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uWaiters = AuAtomicLoad(&this->uSleeping_);
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if (uWaiters > 0)
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{
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AuAtomicAdd(&this->uState_, 1u);
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@ -163,7 +163,7 @@ namespace Aurora::Threading::Primitives
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AuUInt32 uWaitCount {};
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AuUInt32 uWaiters {};
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uWaiters = this->uSleeping_;
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uWaiters = AuAtomicLoad(&this->uSleeping_);
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if (uWaiters > 0)
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{
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AuAtomicAdd(&this->uState_, uWaiters);
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@ -17,9 +17,6 @@
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namespace Aurora::Threading::Primitives
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{
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#define barrier() __asm__ __volatile__("sfence": : :"memory")
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#define compilerReorderBarrier() __asm__ __volatile__("": : :"memory")
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MutexImpl::MutexImpl()
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{
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@ -153,9 +150,9 @@ namespace Aurora::Threading::Primitives
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void MutexImpl::Unlock()
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{
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__sync_lock_release(&this->state_);
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compilerReorderBarrier();
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if (this->dwSleeping_)
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AuAtomicClearU8Lock(&this->state_);
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if (AuAtomicLoad(&this->dwSleeping_))
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{
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futex_wake(&this->state_, 1);
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}
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@ -273,36 +273,38 @@ namespace Aurora::Threading::Primitives
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auto &uValueRef = this->state_;
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#if defined(AURORA_COMPILER_MSVC)
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#if defined(AURORA_ARCH_X86) || defined(AURORA_ARCH_X64)
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// Intel 64 and IA - 32 Architectures Software Developer's Manual, Volume 3A: Section: 8.2.3.1
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*(AuUInt8 *)&uValueRef = 0;
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// From this point onwards, our thread could be subject to StoreLoad re-ordering
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// ...but it should not matter.
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// Given the memory model of x86[64], we can only really expect to be out of order during an unfenced load operation, which in this class, can only be expected under this function before the CAS.
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// No other place reads.
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// Re-ordering race condition 1: one thread wins an atomic bit set, that we dont catch until the CAS, resulting in: a slow implicit fence under the cas, a mm_pause stall, a compare, and a return
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// alt: uValueRef reads zero, resulting in a preemptive return while no threads need to be awoken
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// Re-ordering race condition 2: we unlock, multiple threads enter ::Lock(), we somehow read `uValue = uValueRef` as zero, and then the first atomic bitsetandtest winner thread signals the keyed mutex
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// I fail to see how:
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// *byte = 0; | |
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// | interlocked atomicbitset | interlocked atomicbitset fail
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// | [logic] | interlocked atomic set kFutexBitWait
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// | *byte = 0; | yield
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// | auto uValue =[acquire]= uValueRef
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// ...would result in the second thread missing the third threads atomic set kFutexBitWait (cst (?) on the account of 8.2.3.1, 8.2.3.8, etc)
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// Also note: mfence is far too expensive and the _ReadWriteBarrier() intrinsics do absolutely nothing
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_ReadWriteBarrier();
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#else
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InterlockedAndRelease((volatile LONG *)&uValueRef, ~0xFF);
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#endif
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#else
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__sync_lock_release((AuUInt8 *)&uValueRef); // __atomic_store_explicit((AuUInt8 *)&uValueRef, 0, __ATOMIC_RELEASE)
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#endif
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//#if defined(AURORA_COMPILER_MSVC)
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// #if defined(AURORA_ARCH_X86) || defined(AURORA_ARCH_X64)
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// // Intel 64 and IA - 32 Architectures Software Developer's Manual, Volume 3A: Section: 8.2.3.1
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// *(AuUInt8 *)&uValueRef = 0;
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//
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// // From this point onwards, our thread could be subject to StoreLoad re-ordering
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// // ...but it should not matter.
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//
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// // Given the memory model of x86[64], we can only really expect to be out of order during an unfenced load operation, which in this class, can only be expected under this function before the CAS.
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// // No other place reads.
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//
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// // Re-ordering race condition 1: one thread wins an atomic bit set, that we dont catch until the CAS, resulting in: a slow implicit fence under the cas, a mm_pause stall, a compare, and a return
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// // alt: uValueRef reads zero, resulting in a preemptive return while no threads need to be awoken
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// // Re-ordering race condition 2: we unlock, multiple threads enter ::Lock(), we somehow read `uValue = uValueRef` as zero, and then the first atomic bitsetandtest winner thread signals the keyed mutex
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// // I fail to see how:
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// // *byte = 0; | |
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// // | interlocked atomicbitset | interlocked atomicbitset fail
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// // | [logic] | interlocked atomic set kFutexBitWait
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// // | *byte = 0; | yield
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// // | auto uValue =[acquire]= uValueRef
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// // ...would result in the second thread missing the third threads atomic set kFutexBitWait (cst (?) on the account of 8.2.3.1, 8.2.3.8, etc)
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//
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// // Also note: mfence is far too expensive and the _ReadWriteBarrier() intrinsics do absolutely nothing
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// _ReadWriteBarrier();
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// #else
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// InterlockedAndRelease((volatile LONG *)&uValueRef, ~0xFF);
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// #endif
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//#else
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// __sync_lock_release((AuUInt8 *)&uValueRef); // __atomic_store_explicit((AuUInt8 *)&uValueRef, 0, __ATOMIC_RELEASE)
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//#endif
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// merged with ROXTL
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AuAtomicClearU8Lock(&uValueRef);
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while (true)
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{
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@ -18,12 +18,6 @@ namespace Aurora::Threading::Primitives
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#define ViewParent ((T *)(((char *)this) - (bIsReadView ? RWLockImpl<true>::kOffsetOfRead : RWLockImpl<true>::kOffsetOfWrite)))
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#endif
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#if defined(AURORA_COMPILER_MSVC)
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#define RWLOCK_REORDER_BARRIER() ::MemoryBarrier();
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#else
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#define RWLOCK_REORDER_BARRIER()
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#endif
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static const auto kRWThreadWriterHardContextSwitchBias = 15;
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template<bool bIsReadView, typename T>
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@ -358,7 +352,7 @@ namespace Aurora::Threading::Primitives
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}
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else
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{
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auto uOld = this->state_;
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auto uOld = AuAtomicLoad(&this->state_);
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if (uOld < 0)
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{
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if (this->reentrantWriteLockHandle_ == GetThreadCookie())
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@ -399,7 +393,7 @@ namespace Aurora::Threading::Primitives
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while (true)
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{
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AuInt32 iCurState;
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while ((iCurState = this->state_) != 0)
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while ((iCurState = AuAtomicLoad(&this->state_)) != 0)
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{
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AuInt64 uSecondTimeout = 0;
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@ -409,13 +403,12 @@ namespace Aurora::Threading::Primitives
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auto pSemaphore = this->GetFutexConditionWriter();
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AuInt32 iCurState;
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while ((iCurState = this->state_) != 0)
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while ((iCurState = AuAtomicLoad(&this->state_)) != 0)
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{
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bool bStatusTwo {};
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AuAtomicAdd(&this->writersPending_, 1);
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static const AuUInt32 kExpect { 0 };
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RWLOCK_REORDER_BARRIER();
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if ((iCurState = this->state_) == 0)
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if ((iCurState = AuAtomicLoad(&this->state_)) == 0)
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{
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bStatus = true;
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bStatusTwo = true;
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@ -655,8 +648,7 @@ namespace Aurora::Threading::Primitives
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}
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else
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{
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/* atomic read */
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bElevation = this->writersPending_ > 0;
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bElevation = AuAtomicLoad(&this->writersPending_) > 0;
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}
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if (bElevation)
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@ -682,21 +674,13 @@ namespace Aurora::Threading::Primitives
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if (!gUseFutexRWLock)
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{
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AU_LOCK_GUARD(this->mutex_);
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#if defined(AURORA_COMPILER_MSVC)
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this->state_ = 0;
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#else
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__sync_lock_release(&this->state_);
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#endif
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AuAtomicStore(&this->state_, 0);
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bElevationPending = this->writersPending_ > 0;
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}
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else
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{
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bElevationPending = this->writersPending_ > 0;
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#if defined(AURORA_COMPILER_MSVC)
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this->state_ = 0;
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#else
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__sync_lock_release(&this->state_);
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#endif
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AuAtomicStore(&this->state_, 0);
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bElevationPending = AuAtomicLoad(&this->writersPending_) > 0;
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}
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if (bElevationPending)
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@ -818,15 +802,14 @@ namespace Aurora::Threading::Primitives
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auto pSemaphore = this->GetFutexConditionWriter();
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AuInt32 iCurState;
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while ((iCurState = this->state_) != 1)
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while ((iCurState = AuAtomicLoad(&this->state_)) != 1)
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{
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bool bStatusTwo {};
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bool bStatus {};
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AuAtomicAdd(&this->writersPending_, 1);
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static const AuUInt32 kExpect { 0 };
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RWLOCK_REORDER_BARRIER();
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if ((iCurState = this->state_) == 1)
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if ((iCurState = AuAtomicLoad(&this->state_)) == 1)
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{
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bStatus = true;
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bStatusTwo = true;
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