[+] (reference futex primitive) AuFutexMutexSpecial = AuThreading::Waitables::FutexWaitableNoVTblMovable
[+] (reference futex primitive) AuFutexMutexSmallest = AuThreading::Waitables::FutexWaitableNoVTblMovableSmallest ...because i cant be arsed
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7cb9355805
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@ -91,6 +91,14 @@ using AuBinarySemaphore = AuThreadPrimitives::Event;
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using AuEvent = AuThreadPrimitives::Event;
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using AuFutexMutex = AuThreading::Waitables::FutexWaitable;
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using AuFutexMutexSpecial = AuThreading::Waitables::FutexWaitableNoVTblMovable;
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// Note: a reference U16/U8 reference impl would be pointless - threefold
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// 1) x86_64 chokes on 16bit atomics;
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// 2) 32bit RISC ISAs would prefer 32bit words;
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// 3) sub 32bit words are just going to junk up our alignment & introduce pointless padding
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using AuFutexMutexSmallest = AuThreading::Waitables::FutexWaitableNoVTblMovableSmallest;
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// TODO:
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//using AuFutexTicketMutex = AuThreading::Waitables::FutexTicketWaitable;
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using AuFutexSemaphore = AuThreading::Waitables::FutexSemaphoreWaitable;
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using AuFutexCond = AuThreading::Waitables::FutexCondWaitable;
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using AuFutexCondition = AuThreading::Waitables::FutexCondWaitable;
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@ -153,4 +153,255 @@ namespace Aurora::Threading::Waitables
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AuAUInt32 uAtomicState {};
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AuAUInt32 uAtomicSleeping {};
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};
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struct FutexWaitableNoVTblMovable final
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{
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AU_COPY_MOVE_DEF(FutexWaitableNoVTblMovable);
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inline bool TryLockNoSpin()
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{
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return AuAtomicTestAndSet(&this->uAtomicState, 0u) == 0;
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}
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inline bool TryLock()
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{
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static const AuUInt32 kRef { 1 };
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if (TryLockNoSpin())
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{
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return true;
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}
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return TryWaitOnAddressEx((const void *)&this->uAtomicState,
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&kRef,
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sizeof(kRef),
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[&](const void *pTargetAddress,
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const void *pCompareAddress,
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AuUInt8 uWordSize)
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{
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return this->TryLockNoSpin();
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});
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}
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inline void Unlock()
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{
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AuAtomicClearU8Lock(&this->uAtomicState);
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if (auto uSleeping = AuAtomicLoad(&this->uAtomicSleeping))
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{
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WakeOnAddress((const void *)&this->uAtomicState);
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}
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}
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inline void Lock()
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{
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static const AuUInt32 kRef { 1 };
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if (TryLock())
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{
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return;
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}
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while (!TryLockNoSpin())
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{
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AuAtomicAdd(&this->uAtomicSleeping, 1u);
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WaitOnAddress((const void *)&this->uAtomicState, &kRef, sizeof(kRef), 0, true);
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AuAtomicSub(&this->uAtomicSleeping, 1u);
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}
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}
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inline bool LockMS(AuUInt64 qwTimeout)
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{
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return LockNS(AuMSToNS<AuUInt64>(qwTimeout));
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}
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inline bool LockAbsMS(AuUInt64 qwTimeout)
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{
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return LockAbsNS(AuMSToNS<AuUInt64>(qwTimeout));
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}
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inline bool LockNS(AuUInt64 qwTimeout)
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{
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static const AuUInt32 kRef { 1 };
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if (TryLockNoSpin())
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{
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return true;
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}
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auto qwEndTime = Time::SteadyClockNS() + qwTimeout;
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if (TryLock())
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{
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return true;
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}
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while (!TryLockNoSpin())
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{
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bool bStatus {};
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AuAtomicAdd(&this->uAtomicSleeping, 1u);
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bStatus = WaitOnAddressSteady((const void *)&this->uAtomicState, &kRef, sizeof(kRef), qwEndTime, true);
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AuAtomicSub(&this->uAtomicSleeping, 1u);
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if (!bStatus)
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{
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return TryLockNoSpin();
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}
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}
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return true;
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}
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inline bool LockAbsNS(AuUInt64 qwTimeoutAbs)
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{
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static const AuUInt32 kRef { 1 };
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if (TryLock())
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{
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return true;
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}
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while (!TryLockNoSpin())
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{
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bool bStatus {};
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AuAtomicAdd(&this->uAtomicSleeping, 1u);
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bStatus = WaitOnAddressSteady((const void *)&this->uAtomicState, &kRef, sizeof(kRef), qwTimeoutAbs, true);
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AuAtomicSub(&this->uAtomicSleeping, 1u);
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if (!bStatus)
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{
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return TryLockNoSpin();
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}
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}
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return true;
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}
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AuAUInt32 uAtomicState {};
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AuAUInt32 uAtomicSleeping {};
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};
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struct FutexWaitableNoVTblMovableSmallest final
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{
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AU_COPY_MOVE_DEF(FutexWaitableNoVTblMovableSmallest);
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inline bool TryLockNoSpin()
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{
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return AuAtomicTestAndSet(&this->uAtomicState, 0u) == 0;
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}
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inline bool TryLock()
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{
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static const AuUInt32 kRef { 1 };
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if (TryLockNoSpin())
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{
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return true;
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}
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return TryWaitOnAddressEx((const void *)&this->uAtomicState,
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&kRef,
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sizeof(kRef),
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[&](const void *pTargetAddress,
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const void *pCompareAddress,
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AuUInt8 uWordSize)
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{
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return this->TryLockNoSpin();
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});
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}
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inline void Unlock()
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{
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AuAtomicClearU8Lock(&this->uAtomicState);
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WakeOnAddress((const void *)&this->uAtomicState);
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}
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inline void Lock()
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{
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static const AuUInt32 kRef { 1 };
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if (TryLock())
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{
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return;
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}
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while (!TryLockNoSpin())
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{
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WaitOnAddress((const void *)&this->uAtomicState, &kRef, sizeof(kRef), 0, true);
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}
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}
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inline bool LockMS(AuUInt64 qwTimeout)
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{
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return LockNS(AuMSToNS<AuUInt64>(qwTimeout));
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}
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inline bool LockAbsMS(AuUInt64 qwTimeout)
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{
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return LockAbsNS(AuMSToNS<AuUInt64>(qwTimeout));
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}
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inline bool LockNS(AuUInt64 qwTimeout)
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{
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static const AuUInt32 kRef { 1 };
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if (TryLockNoSpin())
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{
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return true;
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}
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auto qwEndTime = Time::SteadyClockNS() + qwTimeout;
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if (TryLock())
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{
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return true;
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}
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while (!TryLockNoSpin())
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{
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bool bStatus {};
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bStatus = WaitOnAddressSteady((const void *)&this->uAtomicState, &kRef, sizeof(kRef), qwEndTime, true);
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if (!bStatus)
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{
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return TryLockNoSpin();
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}
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}
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return true;
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}
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inline bool LockAbsNS(AuUInt64 qwTimeoutAbs)
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{
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static const AuUInt32 kRef { 1 };
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if (TryLock())
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{
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return true;
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}
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while (!TryLockNoSpin())
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{
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bool bStatus {};
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bStatus = WaitOnAddressSteady((const void *)&this->uAtomicState, &kRef, sizeof(kRef), qwTimeoutAbs, true);
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if (!bStatus)
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{
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return TryLockNoSpin();
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}
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}
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return true;
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}
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// Note: a reference U16/U8 reference impl would be pointless - threefold
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// 1) x86_64 chokes on 16bit atomics;
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// 2) 32bit RISC ISAs would prefer 32bit words;
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// 3) sub 32bit words are just going to junk up our alignment & introduce pointless padding
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AuAUInt32 uAtomicState {};
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};
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}
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