[+] Use hwinfo cacheline in Cache.cpp fallback asm impl of instruction flush
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@ -85,14 +85,18 @@ namespace Aurora::Memory::Cache
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cacheflush(AuReinterpretCast<const void *>(base), length, ICACHE);
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#elif (defined(AURORA_ARCH_X86) || defined(AURORA_ARCH_X64)) && (defined(AURORA_COMPILER_CLANG) || AURORA_COMPILER_GCC)
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const size_t cacheLine = 64; // TODO: pull from Aurora::HWInfo
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auto dwCacheLine = AuHwInfo::GetCPUInfo().dwCacheLine;
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const auto kCacheLine = dwCacheLine ?
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dwCacheLine :
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64;
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asm volatile("sfence\n\t"
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:
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:
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: "memory");
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for (AuUInt i = 0; i < length; i += cacheLine)
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for (AuUInt i = 0; i < length; i += kCacheLine)
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{
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asm volatile("clflush (%0)\n\t"
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:
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