AuroraSupport/AuroraRuntime
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[*] Refactor CpuInfo

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[*] class -> struct RSA interface
This commit is contained in:
Reece Wilson 2022-02-18 10:46:51 +00:00
parent 1479219b04
commit df1c36bd28
8 changed files with 42 additions and 44 deletions
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2
Include/Aurora/Crypto/CA/CA.hpp
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@ -9,7 +9,7 @@
namespace Aurora::Crypto::RSA
{
class IRSAPublic;
struct IRSAPublic;
}
namespace Aurora::Crypto::CA

3
Include/Aurora/Crypto/RSA/IRSAPrivate.hpp
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@ -10,9 +10,8 @@
namespace Aurora::Crypto::RSA
{
// Remember: there is no such thing as private encryption
class IRSAPrivate
struct IRSAPrivate
{
public:
virtual bool Sign(const Memory::MemoryViewRead &payload,
EHashType method,
EPaddingType type,

3
Include/Aurora/Crypto/RSA/IRSAPublic.hpp
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@ -10,9 +10,8 @@
namespace Aurora::Crypto::RSA
{
// Rememeber: there is no such thing as public decryption
class IRSAPublic
struct IRSAPublic
{
public:
virtual bool Verify(const Memory::MemoryViewRead &plainText,
const Memory::MemoryViewRead &signature,
EHashType method,

10
Include/Aurora/HWInfo/CpuInfo.hpp
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@ -16,16 +16,16 @@ namespace Aurora::HWInfo
{
Aurora::Build::EArchitecture cpuArch;
AuUInt8 socket;
AuUInt8 cores;
AuUInt8 threads;
AuUInt8 uSocket;
AuUInt8 uCores;
AuUInt8 uThreads;
AuList<AuInt64> threadTopology;
AuList<CpuBitId> serverTopology;
CpuBitId maskECores;
bool maskMTContig;
bool maskMTHalf;
bool bMaskMTContig;
bool bMaskMTHalf;
CpuId cpuId;
};

8
Source/HWInfo/CpuInfo.BSD.cpp
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@ -30,11 +30,11 @@ namespace Aurora::HWInfo
opt = QueryBsdHwStat(HW_NCPU);
}
gCpuInfo.socket = 1;
gCpuInfo.cores = 1;
gCpuInfo.threads = opt.value_or(1);
gCpuInfo.uSocket = 1;
gCpuInfo.uCores = 1;
gCpuInfo.uThreads = opt.value_or(1);
// TODO: parse sysctl kern.sched.topology_spec
gCpuInfo.maskMTHalf = true;
gCpuInfo.bMaskMTHalf = true;
}
}

8
Source/HWInfo/CpuInfo.Linux.cpp
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@ -24,11 +24,11 @@ namespace Aurora::HWInfo
{
void SetCpuTopologyLinux()
{
gCpuInfo.socket = 1;
gCpuInfo.cores = 1;
gCpuInfo.threads = get_nprocs();
gCpuInfo.uSocket = 1;
gCpuInfo.uCores = 1;
gCpuInfo.uThreads = get_nprocs();
// TODO: parse /proc/cpuinfo
gCpuInfo.maskMTHalf = true;
gCpuInfo.bMaskMTHalf = true;
}
}

32
Source/HWInfo/CpuInfo.NT.cpp
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@ -77,23 +77,23 @@ namespace Aurora::HWInfo
gCpuInfo.threadTopology.push_back(shortMask);
}
gCpuInfo.socket = 1;
gCpuInfo.threads = cpuCount;
gCpuInfo.cores = cpuThreads.size();
gCpuInfo.uSocket = 1;
gCpuInfo.uThreads = cpuCount;
gCpuInfo.uCores = cpuThreads.size();
if (!GetLogicalProcessorInformation(sysinfo, &length))
{
return true;
}
gCpuInfo.socket = 0;
gCpuInfo.uSocket = 0;
length /= sizeof(*sysinfo);
for (auto i = 0; i < length; i++)
{
if (sysinfo[i].Relationship == RelationProcessorPackage)
{
gCpuInfo.socket++;
gCpuInfo.uSocket++;
}
}
@ -117,17 +117,17 @@ namespace Aurora::HWInfo
{
SYSTEM_INFO sysinfo;
GetSystemInfo(&sysinfo);
gCpuInfo.socket = 1;
gCpuInfo.cores = 1;
gCpuInfo.threads = sysinfo.dwNumberOfProcessors;
gCpuInfo.uSocket = 1;
gCpuInfo.uCores = 1;
gCpuInfo.uThreads = sysinfo.dwNumberOfProcessors;
return;
}
length /= sizeof(*sysinfo);
gCpuInfo.socket = 0;
gCpuInfo.cores = 0;
gCpuInfo.threads = 0;
gCpuInfo.uSocket = 0;
gCpuInfo.uCores = 0;
gCpuInfo.uThreads = 0;
bool sparse = false;
for (auto i = 0; i < length; i++)
@ -136,7 +136,7 @@ namespace Aurora::HWInfo
{
auto mask = sysinfo[i].ProcessorMask;
gCpuInfo.cores++;
gCpuInfo.uCores++;
gCpuInfo.threadTopology.push_back(mask);
CpuBitId serverId;
@ -160,16 +160,16 @@ namespace Aurora::HWInfo
if (counter++) sparse = true;
// Increment threads by the bits set in
gCpuInfo.threads += tmp;
gCpuInfo.uThreads += tmp;
}
}
else if (sysinfo[i].Relationship == RelationProcessorPackage)
{
gCpuInfo.socket++;
gCpuInfo.uSocket++;
}
}
gCpuInfo.maskMTContig = !sparse;
gCpuInfo.maskMTHalf = sparse;
gCpuInfo.bMaskMTContig = !sparse;
gCpuInfo.bMaskMTHalf = sparse;
}
}

20
Source/HWInfo/CpuInfo.cpp
View File

@ -39,9 +39,9 @@ namespace Aurora::HWInfo
SetCpuTopologyLinux();
#elif defined(AURORA_IS_POSIX_DERIVED)
gCpuInfo.socket = 1;
gCpuInfo.cores = 1;
gCpuInfo.threads = sysconf(_SC_NPROCESSORS_ONLN);
gCpuInfo.uSocket = 1;
gCpuInfo.uCores = 1;
gCpuInfo.uThreads = sysconf(_SC_NPROCESSORS_ONLN);
#endif
}
@ -53,14 +53,14 @@ namespace Aurora::HWInfo
return;
}
bool fakeMtHalf = (gCpuInfo.threads & 1) == 0;
gCpuInfo.maskMTHalf = fakeMtHalf;
bool fakeMtHalf = (gCpuInfo.uThreads & 1) == 0;
gCpuInfo.bMaskMTHalf = fakeMtHalf;
if (fakeMtHalf)
{
for (int i = 0; i < gCpuInfo.threads / 2; i++)
for (int i = 0; i < gCpuInfo.uThreads / 2; i++)
{
AuUInt64 shortMask {AuUInt64(1) << AuUInt64(i)}, shortMask2 {AuUInt64(1) << AuUInt64(i + gCpuInfo.threads / 2)};
AuUInt64 shortMask {AuUInt64(1) << AuUInt64(i)}, shortMask2 {AuUInt64(1) << AuUInt64(i + gCpuInfo.uThreads / 2)};
CpuBitId mask;
mask.lower = shortMask | shortMask2;
gCpuInfo.serverTopology.push_back(mask);
@ -69,7 +69,7 @@ namespace Aurora::HWInfo
}
else
{
for (int i = 0; i < gCpuInfo.threads; i++)
for (int i = 0; i < gCpuInfo.uThreads; i++)
{
AuUInt64 shortMask {AuUInt64(1) << AuUInt64(i)};
CpuBitId mask;
@ -82,8 +82,8 @@ namespace Aurora::HWInfo
void InitCpuInfo()
{
gCpuInfo.maskMTContig = false;
gCpuInfo.maskMTHalf = false;
gCpuInfo.bMaskMTContig = false;
gCpuInfo.bMaskMTHalf = false;
gCpuInfo.cpuArch = Aurora::Build::kCurrentArchitecture;
SetCpuId();
SetCpuTopology();