Commit Graph

16 Commits

Author SHA1 Message Date
Lukas Taparauskas
72a2ec4c1b
MSL: Fix '--msl-multi-patch-workgroup' out of bounds reads when dispatching more threads than control points (#1662)
* Fix '--msl-multi-patch-workgroup' cases where thread count exceeds data bounds

*Fix gl_PrimitiveID off by one error when computing last valid index
*Point gl_out to the last patch's data when threads exceed input data bounds
*Point patchOut to the last patch's data when threads exceed input data bounds

* Update MSL test expectations.

* Undo change to MSL multi-patch hull output bound checks

* Update MSL multi-patch test expectations.
2021-04-29 20:01:26 +02:00
Hans-Kristian Arntzen
ae9ca7d73c MSL: Fix copy of arrays to/from stage IO variables.
Need to take into account effective storage classes and whether or not
we target stage IO blocks since native arrays are conditionally enabled.
2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
c1edd35d57 MSL: Use spvUnsafeArray for builtin arrays after all.
It will get too messy to deal with constant initializers any other way,
so just deal with complexity in argument_decl instead ...
2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
23da445bd4 MSL: Emit multiple threadgroup slices for multi-patch.
Multiple patches can run in the same workgroup when using multi-patch
mode, so we need to allocate enough storage to avoid false sharing.
2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
5e9c2d060e MSL: Cleanup fallback IO block emission.
Need to emit in add_variable_to_iface(). Unifies the code paths a fair
bit.
2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
e32c474911 MSL: Handle masking of TESC IO block members. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
46c48ee6b5 MSL: Rewrite how IO blocks are emitted in multi-patch mode.
Firstly, never flatten inputs or outputs in multi-patch mode.
The main scenario where we do need to care is Block IO.
In this case, we should only flatten the top-level member, and after
that we use access chains as normal.

Using structs in Input storage class is now possible as well. We don't
need to consider per-location fixups at all here. In Vulkan, IO structs
must match exactly. Only plain vectors can have smaller vector sizes as
a special case.
2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
ff3f5bcba5 MSL: Handle masking of builtin control points. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
436b1250da MSL: Do not perform scalar fixups for control-point outputs. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
74b2acab9b MSL: Always emit block variable for block types. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
ae7bb41ef4 MSL: Test that we can mask location writes in TESC. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
ba93b6518d MSL: Fix masking of vertex block outputs. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
857295a9ab MSL: Add tests for masking with --for-tess. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
43b6ea2c9a MSL: Remove position mask tests. They will fail compilation. 2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
50a6bc058a MSL: Force builtin arrays for builtin array types.
Handles argument_decl() correctly.
2021-04-19 12:10:49 +02:00
Hans-Kristian Arntzen
88b54f5dab MSL: Add tests for vertex output masking. 2021-04-19 12:10:49 +02:00