Commit Graph

183 Commits

Author SHA1 Message Date
Dejan Mircevski
50babb2d00 Run clang-format. 2015-10-26 12:55:33 -04:00
Dejan Mircevski
903f9d6b70 Implement alternate-parsing mode for !<integer>. 2015-10-26 12:55:33 -04:00
David Neto
e3940ab166 Readme: capabilities for instructions are ok
Capabilities for enumerants may be out of date.
2015-10-26 12:55:33 -04:00
Andrew Woloszyn
38acba2c3c Updated syntax.md to remove references to % numerical ids. 2015-10-26 12:55:33 -04:00
Dejan Mircevski
9672ad39cf Remove isIdType(), which is now dead code. 2015-10-26 12:55:33 -04:00
David Neto
c348d18486 Test bad 2nd target to OpGroupMemberDecorate 2015-10-26 12:55:33 -04:00
David Neto
454f51fa4d Assembly test for OpGroupMemberDecorate
Provides test coverage for OperandVariableIdLiteral
from the syntax table in the file 'opcode.inc'.
2015-10-26 12:55:33 -04:00
Dejan Mircevski
1b6f1960a8 Uncomment some !<integer> tests. 2015-10-26 12:55:33 -04:00
David Neto
d83179af7e Cleanup: Use EnumCase in OpDecorateSimpleTest 2015-10-26 12:55:33 -04:00
David Neto
ab778dc1dc Cleanup: Use EnumCase for ExecutionMode test 2015-10-26 12:55:33 -04:00
David Neto
54b2ea1088 Assembler test for optional operands of OpSource
These are the first tests to cover OperandOptionalId
and OperandOptionalLiteralString from the grammar in
opcode.inc
2015-10-26 12:55:33 -04:00
David Neto
561dc4e975 Remove SPV_OPERAND_TYPE_LITERAL
All uses of OptionalLiteral by the SPIR-V spec are used
for literal numbers.

Also rename:
- SPV_OPERAND_TYPE_OPTIONAL_LITERAL to
  SPV_OPERAND_TYPE_OPTIONAL_LITERAL_NUMBER.
- SPV_OPERAND_TYPE_VARIABLE_LITERAL to
  SPV_OPERAND_TYPE_VARIABLE_LITERAL_NUMBER.
- SPV_OPERAND_TYPE_VARIABLE_LITERAL_ID to
  SPV_OPERAND_TYPE_VARIABLE_LITERAL_NUMBER_ID.
- SPV_OPERAND_TYPE_VARIABLE_ID_LITERAL to
  SPV_OPERAND_TYPE_VARIABLE_ID_LITERAL_NUMBER.
- SPV_OPERAND_TYPE_LITERAL_IN_OPTIONAL_TUPLE to
  SPV_OPERAND_TYPE_LITERAL_NUMBER_IN_OPTIONAL_TUPLE.
2015-10-26 12:55:33 -04:00
David Neto
f1b6471670 Dissasembler test showing reordering of masks 2015-10-26 12:55:33 -04:00
David Neto
b14a727a30 Execution scope, memory semantics operands are IDs
They shouldn't be parsed or printed as masks.
2015-10-26 12:55:33 -04:00
David Neto
619db2612e Disassembler support for mask expressions. 2015-10-26 12:55:33 -04:00
David Neto
e4eba63932 Update Readme: Support Rev32; IDs never alias 2015-10-26 12:55:33 -04:00
David Neto
bfa3d86f7b Memory semantics Relaxed is a synonym for None
The disassembler should prefer to print Relaxed,
I think. (Untested.)
2015-10-26 12:55:33 -04:00
David Neto
212bafe4da Assembler tests for remaining Debug instructions
OpString, OpName, OpMemberName, OpLine, OpNoLine,
OpSourceContinued.
2015-10-26 12:55:33 -04:00
David Neto
e0890da603 Update core instruction syntax to Rev32
Many instructions added and a few changed structure.

Workarounds:
- Some operands can be enabled by either one of two
  capabilities.  The spv_operand_desc_t does not handle that
  now. For now just select the first one.

Fixes to tests:
- OpLoopMerge now takes a mandatory continue target.
- OpTypePipe drops the type argument.  Pipes are opaque.
- OpLine no longer takes a target ID argument.

The ID validator was fixed the OpLine and OpTypePipe
changes.  Those were the only ID validator tests affected.

The patch to the spec doc generator was updated so it handles
the two-capability case, even if in an hacky way.
2015-10-26 12:55:33 -04:00
David Neto
6b31ce4d50 Assembler test TODOs for image instructions. 2015-10-26 12:55:33 -04:00
David Neto
d768798d48 Assembler supports new decorations in Rev32
They are:
 - NoContraction
 - InputTargetIndex
 - Alignment
2015-10-26 12:55:33 -04:00
Lei Zhang
863ddbeeaa Rev32: Remove DepthAny and mark Xfb as requiring TransformFeedback. 2015-10-26 12:55:33 -04:00
David Neto
d30b2331a3 Fix Capability dependencies on capabilities, Rev32 2015-10-26 12:55:33 -04:00
David Neto
c66f5074e2 Assembler support for new capabilities in Rev32 2015-10-26 12:55:33 -04:00
David Neto
8576c9c327 Support Image operand MinLod 2015-10-26 12:55:33 -04:00
David Neto
2d1b5e5bba Assembler supports new builtins in Rev32
They are VertexIndex and InstanceIndex.
2015-10-26 12:55:33 -04:00
David Neto
49c299b094 Assembler support for Nontemporal memory access 2015-10-26 12:55:33 -04:00
Lei Zhang
85c6f79081 Define two macros to simplify code for ExecutionMode operands. 2015-10-26 12:55:33 -04:00
David Neto
c09d3857ff Fix permissions on test/TextToBinary.Barrier.cpp 2015-10-26 12:55:33 -04:00
David Neto
aa0c3a5c07 Support Dim InputTarget 2015-10-26 12:55:33 -04:00
David Neto
9819adf4cb Support StorageClass PushConstant 2015-10-26 12:55:33 -04:00
David Neto
3e52dd915d Support ExecutionMode IndependentForwardProgress 2015-10-26 12:55:33 -04:00
David Neto
16df562ad3 Assembler test for Memory Semantics enum
Enables mask expression parsing for Memory Semantics arguments,
e.g. on OpMemoryBarrier.
2015-10-26 12:55:33 -04:00
Andrew Woloszyn
13804e5d63 All values now represent symbolic names instead of mixed with numeric.
Also removed un-necessary heap-allocation of spv_named_id_table.
This removed the necessity to expose a function to create/destroy it
and simplified the interface.
2015-10-26 12:55:33 -04:00
Lei Zhang
a66952d38c Remove executable file mode bits on source files. 2015-10-26 12:55:33 -04:00
David Neto
dbaf40718a Update to Rev32 headers. Part 1.
Just enough fixes to code make it build and pass tests.

Core changes:
 - Fix spelling for: NoPerspective, NonWritable, NonReadable,
 - Remove NoStaticUse, RelaxedMask

GLSL changes:
 - Fixed spelling for: InverseSqrt, FaceForward, MatrixInverse,
   SmoothStep, FindILsb, FindSMsb, FindUMsb
 - Replace Mix with IMix and FMix
 - Remove AddCarry, SubBorrow, MulExtended

Replace header OpenCLLib.h with OpenCL.std.h

TODO:
 - Regenerate the core instruction syntax table (source/opcode.inc)
 - Add test coverage for new enums and instructions.
2015-10-26 12:55:33 -04:00
Andrew Woloszyn
e0d351b3ad Switched VecTypeHint to take a LiteralNumber instead of an ID 2015-10-26 12:55:33 -04:00
Andrew Woloszyn
fabeeb863b Removed duplicate code due to what looks like a merge issue 2015-10-26 12:55:33 -04:00
David Neto
74af05f012 Cleanups for EnumCase
Make it a class, since it has non-trivial behaviour for converting
the enumerated value to a uint32_t value. (Comply with style guide.)

Merge EnumCaseWithOperands into EnumCase.
2015-10-26 12:55:33 -04:00
David Neto
1b5fd4962e Put the test fixture into spvtest namespace.
All test utility code should go into the spvtest namespace.
2015-10-26 12:55:33 -04:00
Andrew Woloszyn
815cb95247 Fix MSVC build for boolean opeartions on enums. 2015-10-26 12:55:33 -04:00
David Neto
cde47431bd Fix the Supported Features section. 2015-10-26 12:55:33 -04:00
David Neto
a570570e17 Readme: Assembler supports all of Rev31, for 32-bit code
Also say that we have fixed problems building with MSVC 2013.
Also document other recent changes.
2015-10-26 12:55:33 -04:00
David Neto
d1dd2fbd7c Put const back on const char* in test case structs 2015-10-26 12:55:33 -04:00
Andrew Woloszyn
f2d0775f1b A bunch of small fixes to build in MSVC2013.
Fixed an issue where some of the tests were testing
the wrong word with the wrong operation. (| != ||).

Coalesced the many versions of EnumCase into one.
Added a get_value() to EnumCase to convert to a uint32_t.

Replaces ASSERT_TRUE(pointer), with ASSERT_NE(nullptr, pointer),
so that we do not do implicit pointer->bool conversion.

Removed const from some test structs since gtest needs to be
able to swap them.
2015-10-26 12:55:33 -04:00
David Neto
ee1b3bb3bb Assembler support for image operands from Rev31
Rev32 and later add many more image operands, and
rearrange their values.
2015-10-26 12:55:33 -04:00
Lei Zhang
184c76dbaf Let EncodeAndDecodeSuccessfully remove preamble comments. 2015-10-26 12:55:33 -04:00
Lei Zhang
6d41581c93 Clean up code for encoding literal operands. 2015-10-26 12:55:33 -04:00
David Neto
3fca4cddee Remove SPV_OPERAND_TYPE_VARIABLE_MEMORY_ACCESS
If a memory mask operand is present, it is a mask.  The mask appears
only once, so just use SPV_OPERAND_TYPE_OPTIONAL_MEMORY_MASK.

The "variable literals" aspect comes into play as follows: if the
Aligned bit is set in the mask, then the parser will be made to
expect the alignment value as a literal number operand that follows
the mask.  That is done through mask operand expansion.
2015-10-26 12:55:33 -04:00
David Neto
5bf88fcc95 Assembler: mask expressions where 1 bits imply operands
Properly support a memory access mask with a combination
of bits, including the Aligned bit. When the Aligned bit is
set, the parser should expect an alignment value literal operand.
2015-10-26 12:55:33 -04:00