Commit Graph

2354 Commits

Author SHA1 Message Date
Shahbaz Youssefi
7fa9e746ef
Introduce spirv-diff (#4611)
spirv-diff is a new tool that produces diff-style output comparing two
SPIR-V modules.  The instructions between the src and dst modules are
matched as best as the tool can, and output is produced (in src
id-space) that shows which instructions are removed in src, added in dst
or modified between them.  The order of instructions are not retained.

Matching instructions between two SPIR-V modules is not trivial, and
thus a number of heuristics are applied in this tool.  In particular,
without debug information, it's hard to match functions as they can be
reordered.  As such, this tool is primarily useful to produce the diff
of two SPIR-V modules derived from the same source.

This tool can be useful in a number of scenarios:

- Compare the SPIR-V before and after modifying a shader
- Compare the SPIR-V produced from a shader before and after compiler
  codegen changes.
- Compare the SPIR-V produced from a shader before and after some
  transformation or optimization.
- Compare the SPIR-V produced from a shader with different compilers.
2022-02-02 10:33:18 -05:00
Steven Perron
b846f8f1dc
Complete handling of RayQueryKHR type (#4690)
The handling of the RayQueryKHR type is not complete in the type
manager.  The tests were not picking this up.  I've added a test to make
sure that the `GenerateAllTypes` function actually does generate all of
the types.  Once it is added there other tests should pick up on the
other parts that were missing.
2022-01-31 15:44:32 +00:00
alan-baker
20b122b2e0
Fix handling of Nontemporal image operand (#4692)
* Nontemporal image operand shouldn't expect a following operand
2022-01-28 21:12:03 -05:00
luzpaz
65ecfd1093
Fix various source comment (doxygen) typos (#4680)
Found via `codespell -q 3 -L fo,lod,parm
2022-01-26 15:13:08 -05:00
Jaebaek Seo
fb9a10cd48
spirv-opt: add pass to Spread Volatile semantics (#4667)
Add a pass to spread Volatile semantics to variables with SMIDNV,
WarpIDNV, SubgroupSize, SubgroupLocalInvocationId, SubgroupEqMask,
SubgroupGeMask, SubgroupGtMask, SubgroupLeMask, or SubgroupLtMask BuiltIn
decorations or OpLoad for them when the shader model is the ray
generation, closest hit, miss, intersection, or callable shaders. This
pass can be used for VUID-StandaloneSpirv-VulkanMemoryModel-04678 and
VUID-StandaloneSpirv-VulkanMemoryModel-04679 (See "Standalone SPIR-V
Validation" section of Vulkan spec "Appendix A: Vulkan Environment for
SPIR-V").

Handle variables used by multiple entry points:

1. Update error check to make it working regardless of the order of
   entry points.
2. For a variable, if it is used by two entry points E1 and E2 and
   it needs the Volatile semantics for E1 while it does not for E2
  - If VulkanMemoryModel capability is enabled, which means we have to
    set memory operation of load instructions for the variable, we
    update load instructions in E1, but do not update the ones in E2.
  - If VulkanMemoryModel capability is disabled, which means we have
    to add Volatile decoration for the variable, we report an error
    because E1 needs to add Volatile decoration for the variable while
    E2 does not.

For the simplicity of the implementation, we assume that all functions
other than entry point functions are inlined.
2022-01-25 13:14:36 -05:00
alan-baker
6938af7f82
Vulkan 1.3 (#4686)
* Add new environment enum for Vulkan 1,3
* Do not require --allow-localsizeid in Vulkan 1.3 to use LocalSizeId
  execution mode
2022-01-25 10:36:08 -05:00
smikims
e8439c1c9d
Avoid infinite recursion in comparison operators on SmallVector (#4681)
C++20 automatically adds reversed versions of operator overloads for
consideration; in this particular instance this results in infinite
recursion, which has now been pointed out elsewhere as a known issue
when migrating to C++20. Here we just disable one of the overloads in
C++20 mode and let the auto-reversing take care of it for us.
2022-01-25 09:07:40 -05:00
Pierre Moreau
58d8b4e29c
linker: Address conversion error introduced in earlier rework (#4685)
* linker: Address conversion error introduced in earlier rework

Also rework the code slightly to first compute the new ID bound and
validate it, and only then, offset all existing IDs.

This makes those two steps clearer, and avoids potentially overflowing
the IDs within a module (even if that would have been caught later on).

Fixes: c3849565 ("Linker improvements (#4679)")
Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/4684

* test/linker: Disable IdsLimit tests for now

They are taking too long to run and results in the CI jobs timing out.
2022-01-24 13:40:57 -05:00
Pierre Moreau
c38495656d
Linker improvements (#4679)
* test/linker: Code factorisation and small tweaks

* linker: Do not fail when going over limits

The limits are minima and implementations or APIs might support higher
limits, so just warn the user about it. And only check for the limits
right before emitting the binary, as limits might change earlier when
removing duplicate instructions, function prototypes, etc.
The only check performed right before merging, is making sure the ID
bound will not overflow the 32 bits following the merge.

Also, use the defines for the limits instead of hard-coding them.

* linker: Require a memory model in each input module

The existing code could run into weird situation. For example, if the
first module had no memory model, it would not emit any memory model
(sort of reasonable) and would accept without complains all possible mix
from later modules as it would not verify them.

* linker: Replace hex version with SPV_SPIRV_VERSION_WORD

* linker: Error out when linking together different versions

Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/4135

* tools/linker: Do not write to disk if linking failed

Also, do not consider warnings as errors.

* tools/linker: Fix formatting in help message

* tools/linker: Further clarify the use of --target-env

Also update the text for the default version to reflect the change made
in 7d768812 ("Basic support for SPIR-V 1.6 (#4663)").
2022-01-22 15:40:19 -05:00
David Neto
8a40f6de57
Add SPIR-V 1.6 support to wasm build (#4674)
* Add SPIR-V 1.6 support to wasm build

* Fix formatting
2022-01-13 13:49:35 -05:00
Pierre Moreau
42dc678913
Remove duplicated "the" from comments (#4666) 2022-01-12 19:04:13 -05:00
Pierre Moreau
05c839ca01
Improvements to disassembly within PassManager (#4677)
* PassManager: Print errors occurring during disassembly

Otherwise one could be greeted by the following text when running
spirv-opt withe the `--print-all` flag:

    ; IR before pass wrap-opkill

    ; IR before pass eliminate-dead-branches

    ; IR before pass merge-return

With this commit, one will instead get:

    error: line 143: Invalid opcode: 400
    warning: line 0: Disassembly failed before pass wrap-opkill

    error: line 143: Invalid opcode: 400
    warning: line 0: Disassembly failed before pass eliminate-dead-branches

    error: line 143: Invalid opcode: 400
    warning: line 0: Disassembly failed before pass merge-return

* PassManager: Use the right target environment when disassembling

Disassembly would fail if features from a newer version of SPIR-V than
1.2 were used.
2022-01-10 10:55:47 -05:00
Steven Perron
b9e0e13d19
Remove misleading comment. (#4676)
The comment in `Array::GetExtraHashWords` is misleading because getting
the hash words is split up between the generic `Type::GetHashWords` and
the type specific `Type::GetExtraHashWords`.  While `IsSameImpl` is
self-contained.  Removing the comment since it is misleading and no
comment is really needed.

Fixes #3248
2022-01-10 09:24:44 -05:00
Alastair Donaldson
75e53b9f68
Avoid uninitialized access to instruction opcode (#4673)
Ensures that instruction's opcode is set to something default when
parsing the module with --preserve-numeric-ids enabled. This avoids
uninitialized accesses and knock-on buffer overflows.

Fixes #4672.
2022-01-04 17:33:33 +00:00
David Neto
df2aad68b9
val: interface struct with builtins must be Block (#4665)
For a shader input/output interface variable of structure type:
If the structure has BuiltIn members, then the structure type
must be Block decorated.

Otherwise, the variable, or the struct members must have locations,
but nothing can have both a location be a BuiltIn.

Implements validation needed to reject the example in
https://github.com/KhronosGroup/SPIRV-Registry/issues/134
2021-12-16 16:48:12 -05:00
David Neto
5d0e3240f0
Patch location validation VUIDs (#4664)
* spirv-val: Add Vulkan Location VUID

* Simplify: interface checking already does all the work

Co-authored-by: sfricke_samsung <s.fricke@samsung.com>
2021-12-16 15:25:23 -05:00
alan-baker
7d768812e2
Basic support for SPIR-V 1.6 (#4663)
* Basic support for SPIR-V 1.6

* Update SPIRV-Headers deps
* Add new environment enum for SPIR-V 1.6
* Make default environment 1.6 for most tools
* Update tests
* Disallow conditional branch with duplicate labels
* Disallow Dim=Buffer with sampled images
* Do not require the non-semantic extension after SPIR-V 1.5
2021-12-15 14:38:28 -05:00
Steven Perron
b7251d4fb7
reflect debug (#4662)
The pass to remove the nonsemantic information and instructions
is used for drivers or tools that may not support them.  Debug
information was only partially handle, which is causing a
problem.  We need to either fully remove debug information or
not remove it all.  Since I can see it being useful to keep the
debug information even when the nonsemantic instructions are
removed, I propose we do not remove debug info.

Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/4269
2021-12-15 11:06:51 -05:00
Steven Perron
354a46a2a2
Rename strip reflect to strip nonsemantic (#4661)
In https://github.com/KhronosGroup/SPIRV-Tools/pull/3110, the strip reflect
pass was changed to also remove all explicitly nonsemantic instructions.  This
makes it so that the name of the pass no longer reflects what the pass actually
does.  This change renames the pass so that it reflects what the pass actaully does.
2021-12-15 09:55:30 -05:00
Shahbaz Youssefi
4322c4b5a7
Refactor the disassembler code for reuse (#4616)
The upcoming spirv-diff tool also outputs disassembly, although in a
per-instruction basis.  This change refactors the disassembler code to
support such a use case.
2021-12-14 09:46:59 -05:00
Dave Airlie
3156158878
optimizer: restore previous ABI. (#4653)
The change in
commit 4ac8e5e541
Author: Greg Fischer <greg@lunarg.com>
Date:   Wed Sep 15 12:38:34 2021 -0600

    Add preserve_interface mode to aggressive_dead_code_elim (#4520)

Broke the C++ ABI for spirv-tools shared libraries on Linux, for not a great reason.

Restore the previous ABI.
2021-12-09 15:58:53 -05:00
Sebastien Alaiwan
a2260d3b1f
Fix compilation (#4656)
* Delete public accessor, whose only user is one unit-test

The underlying container type becomes invisible from the outside.

* Fix compilation
2021-12-09 12:42:53 -05:00
jiaxin.lai
d240d0db92
fix file encoding (#4654) 2021-12-09 09:43:55 -05:00
Andrei Malashkin
6926c3d9a3
treat google user type as normal semantic google. It's a backport from diligent fork (#4632) 2021-12-09 09:42:40 -05:00
Sebastien Alaiwan
b9e255b366
DefUseManager: rename comparison operators to 'CompareAndPrintDifferences' (#4624)
This make sense, as those are actually debug functions
and shouldn't be used in production code.
2021-12-09 09:41:42 -05:00
Sebastien Alaiwan
f37551d2b6
Use a struct (instead of tuple), with explicit member names. (#4621)
* Cleanup includes.

* Simplify assertion.

* Use a struct with named members for 'UserEntry'
2021-12-09 09:40:29 -05:00
Sebastien Alaiwan
64328e94db
Avoid an extra map lookup (#4623)
Speedup: 5% less time on a real-world compilation batch
(nearly 10k parallel compilations)
(Durations: Before: 156.5s, After: 147.4s)
2021-12-08 14:53:36 -05:00
Marius Hillenbrand
1ed847f438
Fix endianness of string literals (#4622)
* Fix endianness of string literals

To get correct and consistent encoding and decoding of string literals
on big-endian platforms, use spvtools::utils::MakeString and MakeVector
(or wrapper functions) consistently for handling string literals.

- add variant of MakeVector that encodes a string literal into an
  existing vector of words
- add variants of MakeString
- add a wrapper spvDecodeLiteralStringOperand in source/
- fix wrapper Operand::AsString to use MakeString (source/opt)
- remove Operand::AsCString as broken and unused
- add a variant of GetOperandAs for string literals (source/val)
... and apply those wrappers throughout the code.

Fixes  #149

* Extend round trip test for StringLiterals to flip word order

In the encoding/decoding roundtrip tests for string literals, include
a case that flips byte order in words after encoding and then checks for
successful decoding. That is, on a little-endian host flip to big-endian
byte order and then decode, and vice versa.

* BinaryParseTest.InstructionWithStringOperand: also flip byte order

Test binary parsing of string operands both with the host's and with the
reversed byte order.
2021-12-08 12:01:26 -05:00
Shahbaz Youssefi
b162ede0de
Use schema instead of reserved in header description (#4615)
For consistency with SPIR-V disassembly which outputs Schema for this
field.
2021-12-08 11:55:36 -05:00
Alastair Donaldson
1f3f0f185b
Avoid uninitialised read when parsing hex float (#4646)
Ensures that when an attempt to read a floating-point value from an
input stream fails, the recieving variable for the read does not end up
uninitialised.

Fixes OSS-Fuzz:40432
Fixes #4644
2021-12-08 11:09:25 -05:00
Alastair Donaldson
f9bcc82ec7
Exit when ID overflow occurs in a fuzzing build (#4652)
Currently if an ID overflow occurs, spirv-opt (and other users of
IRContext) emits a warning and starts returning 0 when fresh ids are
requested. This tends to lead to crashes - such as null pointer
exceptions. When these arise during fuzzing they lead to auto-reported
bugs.

This change uses an ifdef guard to instead gracefully exit as soon as an
ID overflow occurs when the build is a fuzzing build.

Related issue: #4539.
2021-12-04 07:18:21 +00:00
Diego Novillo
c75a1a46f3
Fix https://github.com/KhronosGroup/SPIRV-Tools/issues/4462 (#4651)
This prevents CCP from making constant -> constant transitions when
evaluating instruction values.  In this case, FClamp is evaluated twice.
On the first evaluation, if computes FClamp(0.5, 0.5, -1) which returns
-1.  On the second evaluation, it computes FClamp(0.5, 0.5, VARYING)
which returns 0.5.

Both fold() computations are correct given the semantics of FClamp() but
this causes a lateral transition in the constant lattice which was not
being considered VARYING by CCP.
2021-12-02 10:40:28 -05:00
Natalie Chouinard
d0a827a9f3
Copy OpDecorateStrings in DescriptorScalarReplacementPass (#4649)
Along with OpDecorate, also clone the OpDecorateString instructions for
variables created in the descriptor scalar replacement pass.

Fixes microsoft/DirectXShaderCompiler#3705
2021-11-29 02:11:22 -05:00
Natalie Chouinard
b023c0da1d
Remove default arguments from lambda (#4648)
Fixes compile failure due to pedantic warning:
`error: default argument specified for lambda parameter [-Werror=pedantic]`
2021-11-26 12:58:43 -05:00
Steven Perron
8c155b364c
Manually fold floating point division by zero (#4637)
See https://github.com/KhronosGroup/SPIRV-Tools/issues/4636 for details.

Fixes #4636.
2021-11-24 14:13:58 -05:00
alan-baker
4b092d2ab8
Allow ADCE to remove dead inputs (#4629)
* https://github.com/KhronosGroup/Vulkan-Docs/issues/666 clearly
  specified that interfaces do not require an input if there is an
  associated output
* ADCE can now remove unused input variables (though they are kept if
  the preserve interfaces option is used)
2021-11-16 15:54:17 -05:00
alan-baker
21e3f681e2
Update SPIRV-Headers (#4628)
* Fix compile
* Fix test
2021-11-10 16:32:09 -05:00
alan-baker
b014238e08
Allow WorkgroupSize on variables for Kernels (#4627)
* Update tests
2021-11-10 15:06:39 -05:00
Greg Fischer
352a411278
Fix handling of OpPhi in convert-relaxed-to-half (#4618)
Fixes #4452
2021-11-09 10:36:50 -07:00
alan-baker
339d4475c1
Improve decoration validation (#4490)
Fixes #4469

* Checks that decorations only usable with structure members are not
  used by OpDecorate or OpDecorateId
* Checks that decorations not allowed on structure members are not used
  with OpMemberDecorate
* Checks decoration targets for most core decorations
* Performs some Vulkan specific validation on deorations
2021-11-05 13:18:19 -04:00
Jaebaek Seo
1589720e10
spirv-opt: create OpDecorate for OpMemberDecorate in desc-sroa (#4617)
The scalar replacement of a resource array/struct variable must create
OpDecorate for elements if OpMemberDecorate instructions decorate
the elements.
2021-11-05 11:05:36 -04:00
Pelle Johnsen
0d0013002a
Add Wasm build (#3752)
* Add wasm build

* Run wasm ci on push

* Add copyright notice to wasm files

* [wasm] Update Emscripten

* [wasm] Change global lambda to regular function

* [wasm] Show detected core count during build

* [wasm] Set JS version from CHANGES, GITHUB_RUN_ID

Also remove custom docker emscripten build with brotli, as not used

* [wasm] Change github actions to use npm-publish

* [wasm] Us docker-compose up for CI

* [wasm] pass GITHUB_RUN_ID to docker

* [wasm] Change GITHUB_RUN_ID to GITHUB_RUN_NUMBER

* [wasm] Fix GITHUB_RUN_NUMBER in docker-compose.yml
2021-11-01 16:45:51 -04:00
Steven Perron
1082de6bb3
Handle overflowing id in merge return (#4606)
If the ids overflow when creating an integer constant in the ir_builder, there will be a nullptr dereference.  This is happening from inside merge return.

We need to propagate the error up, and make sure it is handled appropriately.
2021-11-01 08:45:32 -04:00
Alastair Donaldson
97d4495600
Avoid bitwise and in boolean expression (#4603)
In #3404 a logical && was replaced with a bitwise & to ensure that
both side-effecting arguments were evaluated. However, this leads to
warnings from some compilers (leading to the OSS-Fuzz build breaking,
in particular).

This change reworks the relevant code so that both arguments to the
logical && are evaluated into temporaries.
2021-10-29 15:36:51 -04:00
Ralf Habacker
e3c7098104
In generated cmake config file for SPIRV-Tools only access cmake target, if present (#4590)
Fixes #4582
2021-10-29 14:05:45 -04:00
sfricke-samsung
c194bb2a7f
spirv-val Update LocalSizeId VUID (#4602) 2021-10-29 11:58:02 -04:00
Steven Perron
6c7885dbde
Change branch handling in ADCE to fix errors (#4596)
Consider the new test case.  The conditional branch in the continue
block is never marked as live.  However, `IsDead` will say it is not
dead, so it does not get deleted.  Because it was never marked as live,
`%false` was not mark as live either, but it gets deleted.  This results
in invalid code.

To fix this properly, we had to reconsider how branches are handle.  We
make the following changes:

1) Terminator instructions that are not branch or OpUnreachable must be
kept, so they are marked as live when initializing the worklist.

2) Branches and OpUnreachable instructions are marked as live if
  a) the block does not have a merge instruction and another instruction
     in the block is marked as live, or
  b) the merge instruction in the same block is marked as live.

3) Any instruction that is not marked as live is removed.

4) If a terminator is to be removed, an OpUnreachable is added.  This
happens when the entire block is dead, and the block will be removed.
The OpUnreachable is generated to make sure the block still has a
terminator, and is valid.

Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/4509.
2021-10-29 10:46:43 -04:00
Steven Perron
bd5bf754b1
Fix Linker generator ID (#4601)
The generator ID is located in the upper 16 bits. The lower bits are
reserved for a version number.

Co-authored-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2021-10-29 10:32:41 -04:00
alan-baker
791f5b463a
Only validate workgroup layout for explicit workgroup memory (#4542)
Fixes #4537

* Only validate the layout of workgroup variables if the
  WorkgroupMemoryExplicitLayoutKHR capability is declared
2021-10-28 16:27:56 -04:00
David Neto
2feb7074d4
Avoid confusing short-circuiting (#3404)
When checking the OpBranchConditional for selection headers,
we intend to register both the true and false targets.
Short circuiting was getting in the way.

Co-authored-by: Steven Perron <stevenperron@google.com>
2021-10-28 15:57:36 -04:00