Commit Graph

614 Commits

Author SHA1 Message Date
Spencer Fricke
c87755bb9f
spirv-val: Add WorkgroupMemoryExplicitLayoutKHR check for Block (#5461) 2023-11-01 10:48:40 -04:00
Nathan Gauër
47b63a4d7d
val: re-add ImageMSArray validation (#5394)
This has been removed in #4752, but not added since.

* fixup! val: re-add ImageMSArray validation

clang-format
2023-09-07 09:39:28 -04:00
Wooyoung Kim
89ca3aa571
SPV_QCOM_image_processing support (#5223) 2023-08-15 15:15:21 -04:00
Nathan Gauër
29431859f5
NFC: replace EnumSet::ForEach with range-based-for (#5322)
EnumSet now supports iterators, meaning we can remove the custom
ForEach.

Signed-off-by: Nathan Gauër <brioche@google.com>
2023-07-13 14:40:47 -04:00
Nathan Gauër
3424b16c10
enumset: STL-ize container (#5311)
This commit adds forward iterator, and renames functions to
it matches the std::unordered_set/std::set better.
This goes against the SPIR-V coding style, but might be better in
the long run, especially when this set is used along real STL
sets.
(Right now, they are not compatible, and requires 2 syntaxes).

This container could in theory handle bidirectional
iterator, but for now, only forward seemed required for
our use-cases.

Signed-off-by: Nathan Gauër <brioche@google.com>
2023-07-12 11:34:44 -04:00
alan-baker
0530a532fc
Validate GroupNonUniform instructions (#5296)
Fixes #5283

* Validate group non-uniform instructions
2023-07-11 08:40:40 -04:00
Nathan Gauër
0f3bea06ef
NFC: rewrite EnumSet to handle larger enums. (#5289)
The current EnumSet implementation is only efficient for enums with
values < than 64. The reason is the first 63 values are stored as a
bitmask in a 64 bit unsigned integer, and the other values are stored
in a std::set.
For small enums, this is fine (most SPIR-V enums have IDs < than 64),
but performance starts to drop with larger enums (Capabilities,
opcodes).

Design considerations:
----------------------

This PR changes the internal behavior of the EnumSet to handle enums
with arbitrary values while staying performant.
The idea is to extend the 64-bits buckets sparsely:
 - each bucket can store 64 value, starting from a multiplier of 64.
This could be considered as a hashset with linear probing.

- For small enums, there is a slight memory overhead due to the bucket
storage, but lookup is still constant.
- For linearly distributed values, lookup is constant.
- Worse case for storage are for enums with values which are multiples of 64.
But lookup is constant.
- Worse case for lookup are enums with a lot of small ranges scattered in
the space (requires linear probing).

For enums like capabilities/opcodes, this bucketing is useful as values
are usually scatters in distinct, but almost contiguous blocks.
(vendors usually have allocated ranges, like [5000;5500], while [1000;5000]
is mostly unused).

Benchmarking:
-------------

Benchmarking was done in 2 ways:
 - a benchmark built for the occasion, which only measure the EnumSet
   performance.
 - SPIRV-Tools tests, to measure a more realist scenario.

Running SPIR-V tests with both implementations shows the same
performance (delta < noise). So seems like we have no regressions.
This method is noisy by nature (I/O, etc), but the most representative
of a real-life scenario.

Protocol:
 - run spirv-tests with no stdout using perf, multiple times.
Result:
 - measure noise is larger than the observed difference.

The custom benchmark was testing EnumSet interfaces using SPIRV enums.
Doing thousand of insertion/deletion/lookup, with 2 kind of scenarios:
 - add once, lookup many times.
 - add/delete/loopkup many time.

For small enums, results are similar (delta < noise). Seems relevant
with the previously observed results as most SPIRV enums are small, and
SPIRV-Tools is not doing that many intensive operations on EnumSets.

Performance on large enums (opcode/capabilities) shows an improvement:

+-----------------------------+---------+---------+---------+
| Metric                      |  Old    |   New   | Delta % |
+-----------------------------+---------+---------+---------+
| Execution time              |   27s   |   7s    |  -72%   |
| Instruction count           |  174b   |  129b   |  -25%   |
| Branch count                |   28b   |   33b   |  +17%   |
| Branch miss                 |  490m   |   26m   |  -94%   |
| Cache-misses                |  149k   |   26k   |  -82%   |
+-----------------------------+---------+---------+---------+

Future work
-----------

This was by-design an NFC change to compare apples-to-apples.
The next PR aims to add STL-like iterators to the EnumSet to allow
using it with STL algorithms, and range-based for loops.

Signed-off-by: Nathan Gauër <brioche@google.com>
2023-07-07 10:41:52 -04:00
Spencer Fricke
870fd1e17a
spirv-val: Label SPV_KHR_cooperative_matrix VUID (#5301) 2023-07-04 09:01:04 -04:00
alan-baker
310a67020a
Validate layouts for PhysicalStorageBuffer pointers (#5291)
* Validate layouts for PhysicalStorageBuffer pointers

Fixes #5282

* These pointers may not orginate from a variable so standard layout
  validation misses them
* Now checks every instructions that results in a physical storage
  buffer pointer
  * May not start from a Block-decorated struct so that part is fudged
    with a valid layout

* formatting
2023-06-23 19:17:55 +00:00
archimedus
04cdb2d344
SPV_KHR_cooperative_matrix (#5286)
* SPV_KHR_cooperative_matrix

* Update DEPS with headers

* Update according to review recommendations

* Bugfix and formatting

* Formatting missed or damaged by VS2022
2023-06-22 18:33:36 -04:00
alan-baker
59b4febd81
Allow OpTypeBool in UniformConstant (#5237)
See https://github.com/KhronosGroup/SPIRV-Registry/issues/72

* OpenGL allowed uniforms to be declared with boolean types, but the
  validator was overly strict in disallowing it
2023-06-06 18:05:04 -04:00
alan-baker
182fd9ebce
Allow physical storage buffer pointer in IO (#5251)
Follow up to #5249

* glslang tests that physical storage buffer pointers can be used as
  varyings in shaders
  * Allow physical storage buffer pointers in IO interfaces as a 64-bit
    type
2023-05-30 20:07:58 -04:00
alan-baker
cf62673e42
Error for invalid location type (#5249)
Fixes https://crbug.com/oss-fuzz/56754

* When checking locations, produce an error if the type cannot be
  assigned a location
2023-05-30 09:08:09 -04:00
Spencer Fricke
23cb9b96cc
spirv-val: Remove VUID from 1.3.251 spec (#5244) 2023-05-29 09:20:07 -04:00
Spencer Fricke
7c39951f6e
spirv-val: Label Interface Location/Component VUIDs (#5221) 2023-05-15 09:53:37 -04:00
alan-baker
d5f69dba55
Remove dead code (#5195)
* Execution model limitation was never executed and the check actually
  belongs with other opcodes
2023-04-14 10:59:01 -04:00
janharaldfredriksen-arm
6f276e05cc
Add support for SPV_EXT_shader_tile_image (#5188)
* Update DEPS file to pull in header changes for SPV_EXT_shader_tile_image
2023-04-13 16:58:00 -04:00
James Price
1877a7f909
Fix vector OpConstantComposite type validation (#5191)
The constituent types much fully match, not just the opcode.
2023-04-13 12:50:16 -04:00
Corentin Wallez
f449fb4ad9
Add default case for spv::Dim for TileImageEXT (#5194)
Without this the switch statement must be updated at the same time as
the SPIR-V headers, which makes rolls impossible.
2023-04-13 16:10:02 +01:00
Steven Perron
7ab0a2781a
Remove non-ascii char from comments. (#5182)
Fixes https://github.com/KhronosGroup/SPIRV-Tools/issues/4851
2023-03-29 15:48:15 -04:00
Spencer Fricke
d8a8af8e6d
spirv-val: Remove unused includes and code (#5176) 2023-03-28 14:18:19 -04:00
Spencer Fricke
8e6563b913
spirv-val: Label new Vulkan VUID 07951 (#5154) 2023-03-18 01:01:50 +00:00
Caio Oliveira
0ce2bc4ce0
spirv-val: Conditional Branch without an exit is invalid in loop header (#5069)
* Update fuzz tests to not use invalid combinations of LoopMerge + BranchConditional

New IDs were selected to make clear the transformation being done here, instead
of reordering all IDs in between or refactoring the SPIR-V in the test.

* spirv-val: Conditional Branch without an exit is invalid in loop header

From 2.16.2, for CFG:

    Selections must be structured. That is, an OpSelectionMerge
    instruction is required to precede:

    - an OpSwitch instruction

    - an OpBranchConditional instruction that has different True Label
      and False Label operands where neither are declared merge blocks
      or Continue Targets.
2023-02-06 10:31:47 -05:00
Maciej
fd1e650cfe
Validate decoration of structs with RuntimeArray (#5094)
Contributes to https://github.com/KhronosGroup/glslang/issues/2439

* When OpTypeStruct is used in Vulkan env and its last member
  is a RuntimeArray, check if the struct is decorated with
  Block or BufferBlock, as required by VUID-...-04680.
2023-02-03 08:58:51 -05:00
alan-baker
b230a7c7d1
Validate operand type before operating on it (#5092)
Fixes https://crbug.com/oss-fuzz/52921

* Validate the data operand of OpBitCount before trying to get its
  dimension
2023-01-31 15:40:22 -05:00
Steven Perron
5db6c38e65
Revert "spirv-val: Initial SPV_EXT_mesh_shader builtins (#5080)" (#5084)
This reverts commit f0b900ed9a.
2023-01-24 19:51:39 +00:00
Spencer Fricke
f0b900ed9a
spirv-val: Initial SPV_EXT_mesh_shader builtins (#5080) 2023-01-23 14:30:45 +00:00
alan-baker
7e8813bb4c
Validate version 5 of clspv reflection (#5050)
* Validate version 5 of clspv reflection

* Add validation for instructions in versions 2 through 5
* Change the instruction reported for remaining indices on an access
  chain to the access chain itself for clarity

* update spirv-headers
2023-01-11 16:58:53 -05:00
Caio Oliveira
f62e121b0d
spirv-val: Use more specific term 'switch header' in error message (#5048)
* spirv-val: Add tests for OpSwitch directly breaking/continuing outer loop

These are not valid, tests verify the validator catches the issue.
2023-01-09 18:39:02 -05:00
alan-baker
5a78d798f7
Fix layout validation (#5015)
* Fix layout validation

Fixes #5010

* Unless scalar block layout is enabled, no member can reside at an
  offset between the end of the previous member that is a struct or
  array and the next multiple of that alignment

* Remove a dead if that was introduced

Co-authored-by: David Neto <dneto@google.com>
2022-12-15 21:38:09 -05:00
alan-baker
9c6a925c87
Fix infinite loop in validator (#5006)
Fixes https://crbug.com/oss-fuzz/53510

* Fix infinite loop that could occur in structured cfg validation due to
  an invalid cfg
2022-12-06 11:22:33 -05:00
Cassandra Beckley
40f5bf59c6
Revert "spirv-val: Multiple interface var with same SC (#4969)" (#5009)
This reverts commit 996d4c021f. This
commit is likely good, but it causes a failure in DXC tests. Will
un-revert once we fix the issue in DXC.
2022-12-05 12:31:01 -08:00
Biswapriyo Nath
9a6f4121f4
Fix missing declaration of std::numeric_limits (#5002)
This fixes the errors:
validate_ray_tracing_reorder.cpp:25:49: error: 'numeric_limits' is not a member of 'std'
2022-11-25 10:54:38 -05:00
alelenv
f33d152400
Add validation support for SPV_NV_shader_invocation_reorder. (#4979)
Co-authored-by: Pankaj Mistry <pmistry@nvidia.com>
2022-11-24 09:50:45 -05:00
Spencer Fricke
996d4c021f
spirv-val: Multiple interface var with same SC (#4969)
* spirv-val: Multiple interface var with same SC

* spirv-val: Use C style headers
2022-11-10 12:32:58 -05:00
Spencer Fricke
a5e766b2b4
spirv-val: Add VUID label for 07703 (#4980) 2022-11-06 19:05:25 -05:00
alan-baker
d35a78db57
Switch SPIRV-Tools to use spirv.hpp11 internally (#4981)
Fixes #4960

* Switches to using enum classes with an underlying type to avoid
  undefined behaviour
2022-11-04 17:27:10 -04:00
alan-baker
4563d90934
Only validate full layout in Vulkan environments (#4972)
Fixes #4671
Fixes https://crbug.com/oss-fuzz/43265

* Only validate full layout in a vulkan environment
  * Universal validation still checks that the right decorations are
    present, but the values are only considered for vulkan
* One exception is that invalid overlaps are only checked for vulkan
  * This is a pragmatic choice as SPIR-V doesn't define the size of
    types so the amount of universal checking would be quite limited
* Removed redundant check for GLSLShared and GLSLPacked decorations
  * Should never have been validated as part of universal validation

* make conditionals independent
2022-10-28 11:52:28 -04:00
Spencer Fricke
9f3a4afae4
spirv-val: Label new Vulkan OpPtrAccessChain VUs (#4975) 2022-10-27 10:10:27 -04:00
Spencer Fricke
0ebf830572
spirv-val: Add OpPtrAccessChain Base checks (#4965) 2022-10-24 12:45:08 -04:00
Spencer Fricke
eb113f0fdf
spirv-val: Improve PR 4831 error message (#4968) 2022-10-20 10:51:43 -04:00
Spencer Fricke
ecd5b9c167
spirv-val: Add remaining Component decoration validation (#4966) 2022-10-17 16:54:39 -04:00
Kévin Petit
a6e6454ef2
spirv-val: Add SPV_ARM_core_builtins validation (#4958)
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: If1680a823aea9662d44def1ec6fe6ac334c00574

Signed-off-by: Kevin Petit <kevin.petit@arm.com>
2022-10-05 22:47:10 -04:00
Shahbaz Youssefi
07d361b675
spirv-val: Add an option to use friendly names or not (#4951)
The always-friendly messages make it harder to debug when the
disassembly is later generated without friendly names.

Additionally, the friendly-name-mapper is slow.  Disabling it improves
performance of an ANGLE test that creates numerous shaders by ~5%.
2022-09-30 12:22:00 -04:00
Shahbaz Youssefi
3ec6b3698e
spirv-val: Consistently quote ids in messages (#4950)
Half the messages used to output 'id[%name]' and half id[%name].  With
this change, all messages consistently output 'id[%name]'.  Some typos
are also fixed in the process.
2022-09-29 10:03:49 +02:00
Spencer Fricke
b53d7a8aff
spirv-val: Add initial SPV_EXT_mesh_shader validation (#4924)
* Move TaskEXT check to OpEmitMeshTasksEXT

* Add MeshNV for Execution Model alias
2022-09-23 11:06:46 -04:00
Diego Novillo
21146c1b4b
Fix builtin validator for unimplemented opcodes. (#4940)
This prevents spurious build failures when new opcodeds are added in
SPIRV-Headers.  It moves all the unhandled opcodes to the `default`
case.
2022-09-21 15:52:34 -04:00
Ricardo Garcia
aeb1c64d4a
spirv-val: Make it legal to use arrays of ray queries (#4938)
Private arrays of ray queries are legal to use. Several CTS tests check
they work properly but were being rejected by spirv-val.
2022-09-21 15:27:36 -04:00
David Neto
91c29a197f
spirv-val: Fix comment for checking extended alignments (#4937)
* getBaseAlignment with roundUp true is called the "extended"
  by the Vulka spec.
* roundUp also affects matrix alignment, not just struct and array
2022-09-16 14:51:48 -04:00
Spencer Fricke
0c4ce11b4a
spirv-val: Update VUID from 1.3.228 Vulkan spec (#4936)
Co-authored-by: alan-baker <alanbaker@google.com>
2022-09-16 14:51:36 -04:00