glibc/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c

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/* Enumerate available IFUNC implementations of a function. sparc version.
Copyright (C) 2012-2020 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
Prefer https to http for gnu.org and fsf.org URLs Also, change sources.redhat.com to sourceware.org. This patch was automatically generated by running the following shell script, which uses GNU sed, and which avoids modifying files imported from upstream: sed -ri ' s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g ' \ $(find $(git ls-files) -prune -type f \ ! -name '*.po' \ ! -name 'ChangeLog*' \ ! -path COPYING ! -path COPYING.LIB \ ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \ ! -path manual/texinfo.tex ! -path scripts/config.guess \ ! -path scripts/config.sub ! -path scripts/install-sh \ ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \ ! -path INSTALL ! -path locale/programs/charmap-kw.h \ ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \ ! '(' -name configure \ -execdir test -f configure.ac -o -f configure.in ';' ')' \ ! '(' -name preconfigure \ -execdir test -f preconfigure.ac ';' ')' \ -print) and then by running 'make dist-prepare' to regenerate files built from the altered files, and then executing the following to cleanup: chmod a+x sysdeps/unix/sysv/linux/riscv/configure # Omit irrelevant whitespace and comment-only changes, # perhaps from a slightly-different Autoconf version. git checkout -f \ sysdeps/csky/configure \ sysdeps/hppa/configure \ sysdeps/riscv/configure \ sysdeps/unix/sysv/linux/csky/configure # Omit changes that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines git checkout -f \ sysdeps/powerpc/powerpc64/ppc-mcount.S \ sysdeps/unix/sysv/linux/s390/s390-64/syscall.S # Omit change that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
2019-09-07 05:40:42 +00:00
<https://www.gnu.org/licenses/>. */
#include <assert.h>
#include <string.h>
#include <wchar.h>
#include <ldsodefs.h>
#include <sysdep.h>
#include <ifunc-impl-list.h>
/* Fill ARRAY of MAX elements with IFUNC implementations for function
NAME and return the number of valid entries. */
size_t
__libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
size_t max)
{
size_t i = 0;
int hwcap;
hwcap = GLRO(dl_hwcap);
IFUNC_IMPL (i, name, memcpy,
sparc: M7 optimized memcpy/mempcpy/memmove Support added to identify Sparc M7/T7/S7/M8/T8 processor capability. Performance tests run on Sparc S7 using new code and old niagara4 code. Optimizations for memcpy also apply to mempcpy and memmove where they share code. Optimizations for memset also apply to bzero as they share code. For memcpy/mempcpy/memmove, performance comparison with niagara4 code: Long word aligned data 0-127 bytes - minimal changes 128-1023 bytes - 7-30% gain 1024+ bytes - 1-7% gain (in cache); 30-100% gain (out of cache) Word aligned data 0-127 bytes - 50%+ gain 128-1023 bytes - 10-200% gain 1024+ bytes - 0-15% gain (in cache); 5-50% gain (out of cache) Unaligned data 0-127 bytes - 0-70%+ gain 128-447 bytes - 40-80%+ gain 448-511 bytes - 1-3% loss 512-4096 bytes - 2-3% gain (in cache); 0-20% gain (out of cache) 4096+ bytes - ± 3% (in cache); 20-50% gain (out of cache) Tested in sparcv9-*-* and sparc64-*-* targets in both multi and non-multi arch configurations. Patrick McGehearty <patrick.mcgehearty@oracle.com> Adhemerval Zanella <adhemerval.zanella@linaro.org> * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile (sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines): Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S: New file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise. * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c (__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7, and __memmove_niagara7. * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR): Add niagara7 option. * sysdeps/sparc/sparc64/multiarch/memmove.c: New file. * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise. * sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise. * sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
2017-12-13 20:12:17 +00:00
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_ADP,
__memcpy_niagara7)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_CRYPTO,
__memcpy_niagara4)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_N2,
__memcpy_niagara2)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_BLKINIT,
__memcpy_niagara1)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_ULTRA3,
__memcpy_ultra3)
IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_ultra1));
IFUNC_IMPL (i, name, mempcpy,
sparc: M7 optimized memcpy/mempcpy/memmove Support added to identify Sparc M7/T7/S7/M8/T8 processor capability. Performance tests run on Sparc S7 using new code and old niagara4 code. Optimizations for memcpy also apply to mempcpy and memmove where they share code. Optimizations for memset also apply to bzero as they share code. For memcpy/mempcpy/memmove, performance comparison with niagara4 code: Long word aligned data 0-127 bytes - minimal changes 128-1023 bytes - 7-30% gain 1024+ bytes - 1-7% gain (in cache); 30-100% gain (out of cache) Word aligned data 0-127 bytes - 50%+ gain 128-1023 bytes - 10-200% gain 1024+ bytes - 0-15% gain (in cache); 5-50% gain (out of cache) Unaligned data 0-127 bytes - 0-70%+ gain 128-447 bytes - 40-80%+ gain 448-511 bytes - 1-3% loss 512-4096 bytes - 2-3% gain (in cache); 0-20% gain (out of cache) 4096+ bytes - ± 3% (in cache); 20-50% gain (out of cache) Tested in sparcv9-*-* and sparc64-*-* targets in both multi and non-multi arch configurations. Patrick McGehearty <patrick.mcgehearty@oracle.com> Adhemerval Zanella <adhemerval.zanella@linaro.org> * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile (sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines): Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S: New file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise. * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c (__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7, and __memmove_niagara7. * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR): Add niagara7 option. * sysdeps/sparc/sparc64/multiarch/memmove.c: New file. * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise. * sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise. * sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
2017-12-13 20:12:17 +00:00
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_ADP,
__mempcpy_niagara7)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_CRYPTO,
__mempcpy_niagara4)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_N2,
__mempcpy_niagara2)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_BLKINIT,
__mempcpy_niagara1)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_ULTRA3,
__mempcpy_ultra3)
IFUNC_IMPL_ADD (array, i, mempcpy, 1, __mempcpy_ultra1));
IFUNC_IMPL (i, name, bzero,
IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_ADP,
__bzero_niagara7)
IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_CRYPTO,
__bzero_niagara4)
IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_BLKINIT,
__bzero_niagara1)
IFUNC_IMPL_ADD (array, i, bzero, 1, __bzero_ultra1));
IFUNC_IMPL (i, name, memset,
IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_ADP,
__memset_niagara7)
IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_CRYPTO,
__memset_niagara4)
IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_BLKINIT,
__memset_niagara1)
IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ultra1));
sparc: M7 optimized memcpy/mempcpy/memmove Support added to identify Sparc M7/T7/S7/M8/T8 processor capability. Performance tests run on Sparc S7 using new code and old niagara4 code. Optimizations for memcpy also apply to mempcpy and memmove where they share code. Optimizations for memset also apply to bzero as they share code. For memcpy/mempcpy/memmove, performance comparison with niagara4 code: Long word aligned data 0-127 bytes - minimal changes 128-1023 bytes - 7-30% gain 1024+ bytes - 1-7% gain (in cache); 30-100% gain (out of cache) Word aligned data 0-127 bytes - 50%+ gain 128-1023 bytes - 10-200% gain 1024+ bytes - 0-15% gain (in cache); 5-50% gain (out of cache) Unaligned data 0-127 bytes - 0-70%+ gain 128-447 bytes - 40-80%+ gain 448-511 bytes - 1-3% loss 512-4096 bytes - 2-3% gain (in cache); 0-20% gain (out of cache) 4096+ bytes - ± 3% (in cache); 20-50% gain (out of cache) Tested in sparcv9-*-* and sparc64-*-* targets in both multi and non-multi arch configurations. Patrick McGehearty <patrick.mcgehearty@oracle.com> Adhemerval Zanella <adhemerval.zanella@linaro.org> * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile (sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines): Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S: New file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise. * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c (__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7, and __memmove_niagara7. * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR): Add niagara7 option. * sysdeps/sparc/sparc64/multiarch/memmove.c: New file. * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise. * sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise. * sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
2017-12-13 20:12:17 +00:00
IFUNC_IMPL (i, name, memmove,
IFUNC_IMPL_ADD (array, i, memmove, hwcap & HWCAP_SPARC_ADP,
__memmove_niagara7)
IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_ultra1));
return i;
}