2003-04-17 19:19:29 +00:00
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/* Atomic operations. PowerPC Common version.
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2004-04-04 03:32:19 +00:00
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Copyright (C) 2003, 2004 Free Software Foundation, Inc.
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2003-03-17 11:22:52 +00:00
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This file is part of the GNU C Library.
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Contributed by Paul Mackerras <paulus@au.ibm.com>, 2003.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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2003-04-17 19:19:29 +00:00
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/*
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Update.
* posix/sched.h: Change prototypes of sched_getaffinity and
sched_setaffinity. Define CPU_SET, CPU_CLR, CPU_ISSET, and CPU_ZERO.
* sysdeps/generic/sched_getaffinity.c: Adjust definition.
* sysdeps/generic/sched_setaffinity.c: Likewise.
* sysdeps/generic/bits/sched.h: Define __CPU_SETSIZE, __NCPUBITS,
__CPUELT, __CPUMASK, cpu_set_t, __cpu_mask, __CPU_ZERO, __CPU_SET,
__CPU_CLR, and __CPU_ISSET.
* sysdeps/unix/sysv/linux/bits/sched.h: Likewise.
* sysdeps/unix/sysv/linux/sched_getaffinity.c: New file.
* sysdeps/unix/sysv/linux/sched_setaffinity.c: New file.
* include/atomic.h (atomic_exchange_acq): Renamed from atomic_exchange.
(atomic_exchange_rel): New #define.
* sysdeps/ia64/bits/atomic.h: Likewise.
* sysdeps/i386/i486/bits/atomic.h (atomic_exchange_acq): Renamed from
atomic_exchange.
* sysdeps/m68k/m68020/bits/atomic.h: Likewise.
* sysdeps/powerpc/bits/atomic.h: Likewise.
* sysdeps/sparc/sparc32/sparcv9/bits/atomic.h: Likewise.
* sysdeps/sparc/sparc64/bits/atomic.h: Likewise.
* sysdeps/x86_64/bits/atomic.h: Likewise.
* csu/tst-atomic.c: Use atomic_exchange_acq instead of atomic_exchange.
2003-05-10 05:36:37 +00:00
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* Never include sysdeps/powerpc/bits/atomic.h directly.
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* Alway use include/atomic.h which will include either
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* sysdeps/powerpc/powerpc32/bits/atomic.h
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* or
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* sysdeps/powerpc/powerpc64/bits/atomic.h
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2003-04-17 19:19:29 +00:00
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* as appropriate and which in turn include this file.
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*/
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2003-03-17 11:22:52 +00:00
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2003-04-17 19:19:29 +00:00
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#include <stdint.h>
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2003-03-17 11:22:52 +00:00
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef int64_t atomic64_t;
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typedef uint64_t uatomic64_t;
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typedef int_fast64_t atomic_fast64_t;
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typedef uint_fast64_t uatomic_fast64_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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Update.
* posix/sched.h: Change prototypes of sched_getaffinity and
sched_setaffinity. Define CPU_SET, CPU_CLR, CPU_ISSET, and CPU_ZERO.
* sysdeps/generic/sched_getaffinity.c: Adjust definition.
* sysdeps/generic/sched_setaffinity.c: Likewise.
* sysdeps/generic/bits/sched.h: Define __CPU_SETSIZE, __NCPUBITS,
__CPUELT, __CPUMASK, cpu_set_t, __cpu_mask, __CPU_ZERO, __CPU_SET,
__CPU_CLR, and __CPU_ISSET.
* sysdeps/unix/sysv/linux/bits/sched.h: Likewise.
* sysdeps/unix/sysv/linux/sched_getaffinity.c: New file.
* sysdeps/unix/sysv/linux/sched_setaffinity.c: New file.
* include/atomic.h (atomic_exchange_acq): Renamed from atomic_exchange.
(atomic_exchange_rel): New #define.
* sysdeps/ia64/bits/atomic.h: Likewise.
* sysdeps/i386/i486/bits/atomic.h (atomic_exchange_acq): Renamed from
atomic_exchange.
* sysdeps/m68k/m68020/bits/atomic.h: Likewise.
* sysdeps/powerpc/bits/atomic.h: Likewise.
* sysdeps/sparc/sparc32/sparcv9/bits/atomic.h: Likewise.
* sysdeps/sparc/sparc64/bits/atomic.h: Likewise.
* sysdeps/x86_64/bits/atomic.h: Likewise.
* csu/tst-atomic.c: Use atomic_exchange_acq instead of atomic_exchange.
2003-05-10 05:36:37 +00:00
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/*
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* Powerpc does not have byte and halfword forms of load and reserve and
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2003-04-17 19:19:29 +00:00
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* store conditional. So for powerpc we stub out the 8- and 16-bit forms.
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*/
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2003-03-21 08:03:25 +00:00
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#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \
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2003-03-17 11:22:52 +00:00
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(abort (), 0)
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2003-03-21 08:03:25 +00:00
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#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
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2003-03-17 11:22:52 +00:00
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(abort (), 0)
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2004-04-04 03:32:19 +00:00
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2003-05-13 21:14:28 +00:00
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#define __arch_compare_and_exchange_bool_8_rel(mem, newval, oldval) \
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(abort (), 0)
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#define __arch_compare_and_exchange_bool_16_rel(mem, newval, oldval) \
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(abort (), 0)
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2003-03-17 11:22:52 +00:00
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#ifdef UP
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2003-03-20 10:18:24 +00:00
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# define __ARCH_ACQ_INSTR ""
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# define __ARCH_REL_INSTR ""
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2003-03-17 11:22:52 +00:00
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#else
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2003-03-20 10:18:24 +00:00
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# define __ARCH_ACQ_INSTR "isync"
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2003-05-13 21:14:28 +00:00
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# ifndef __ARCH_REL_INSTR
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# define __ARCH_REL_INSTR "sync"
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# endif
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2003-03-17 11:22:52 +00:00
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#endif
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2003-04-17 19:19:29 +00:00
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#define atomic_full_barrier() __asm ("sync" ::: "memory")
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#define atomic_write_barrier() __asm ("eieio" ::: "memory")
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2003-05-13 21:14:28 +00:00
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile ( \
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"1: lwarx %0,0,%1\n" \
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" cmpw %0,%2\n" \
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" bne 2f\n" \
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" stwcx. %3,0,%1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&r" (__tmp) \
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: "b" (__memp), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
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})
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2003-03-17 11:22:52 +00:00
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2003-05-13 21:14:28 +00:00
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#define __arch_compare_and_exchange_val_32_rel(mem, newval, oldval) \
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2003-04-15 18:39:09 +00:00
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({ \
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%1\n" \
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" cmpw %0,%2\n" \
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" bne 2f\n" \
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" stwcx. %3,0,%1\n" \
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" bne- 1b\n" \
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2003-05-13 21:14:28 +00:00
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"2: " \
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2003-04-15 18:39:09 +00:00
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: "=&r" (__tmp) \
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: "b" (__memp), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
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})
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2003-05-13 21:14:28 +00:00
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#define __arch_atomic_exchange_32_acq(mem, value) \
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({ \
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__typeof (*mem) __val; \
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__asm __volatile ( \
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"1: lwarx %0,0,%2\n" \
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" stwcx. %3,0,%2\n" \
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" bne- 1b\n" \
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" " __ARCH_ACQ_INSTR \
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: "=&r" (__val), "=m" (*mem) \
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2004-04-04 03:32:19 +00:00
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: "b" (mem), "r" (value), "m" (*mem) \
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2003-05-13 21:14:28 +00:00
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_exchange_32_rel(mem, value) \
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2003-03-25 22:40:21 +00:00
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({ \
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__typeof (*mem) __val; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%2\n" \
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2003-03-26 04:02:03 +00:00
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" stwcx. %3,0,%2\n" \
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" bne- 1b" \
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2003-03-25 22:40:21 +00:00
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: "=&r" (__val), "=m" (*mem) \
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2004-04-04 03:32:19 +00:00
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: "b" (mem), "r" (value), "m" (*mem) \
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2003-05-13 21:14:28 +00:00
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: "cr0", "memory"); \
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2003-03-25 22:40:21 +00:00
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__val; \
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})
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2003-03-20 10:18:24 +00:00
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2003-04-15 18:39:09 +00:00
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#define __arch_atomic_exchange_and_add_32(mem, value) \
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2003-03-25 22:40:21 +00:00
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({ \
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__typeof (*mem) __val, __tmp; \
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__asm __volatile ("1: lwarx %0,0,%3\n" \
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2003-03-26 04:02:03 +00:00
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" add %1,%0,%4\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b" \
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2003-03-25 22:40:21 +00:00
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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2004-04-04 03:32:19 +00:00
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: "b" (mem), "r" (value), "m" (*mem) \
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2003-05-13 21:14:28 +00:00
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: "cr0", "memory"); \
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2003-03-25 22:40:21 +00:00
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__val; \
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})
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2003-03-28 07:17:02 +00:00
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2003-04-15 18:39:09 +00:00
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#define __arch_atomic_decrement_if_positive_32(mem) \
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2003-03-27 23:50:55 +00:00
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({ int __val, __tmp; \
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__asm __volatile ("1: lwarx %0,0,%3\n" \
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" cmpwi 0,%0,0\n" \
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" addi %1,%0,-1\n" \
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" ble 2f\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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2004-04-04 03:32:19 +00:00
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: "b" (mem), "m" (*mem) \
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2003-05-13 21:14:28 +00:00
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: "cr0", "memory"); \
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2003-03-27 23:50:55 +00:00
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__val; \
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})
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2003-04-15 18:39:09 +00:00
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#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_compare_and_exchange_val_32_acq(mem, newval, oldval); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_compare_and_exchange_val_64_acq(mem, newval, oldval); \
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else \
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abort (); \
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__result; \
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})
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2004-04-04 03:32:19 +00:00
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2003-05-13 21:14:28 +00:00
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#define atomic_compare_and_exchange_val_rel(mem, newval, oldval) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_compare_and_exchange_val_32_rel(mem, newval, oldval); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_compare_and_exchange_val_64_rel(mem, newval, oldval); \
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else \
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abort (); \
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__result; \
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})
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2003-04-15 18:39:09 +00:00
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Update.
* posix/sched.h: Change prototypes of sched_getaffinity and
sched_setaffinity. Define CPU_SET, CPU_CLR, CPU_ISSET, and CPU_ZERO.
* sysdeps/generic/sched_getaffinity.c: Adjust definition.
* sysdeps/generic/sched_setaffinity.c: Likewise.
* sysdeps/generic/bits/sched.h: Define __CPU_SETSIZE, __NCPUBITS,
__CPUELT, __CPUMASK, cpu_set_t, __cpu_mask, __CPU_ZERO, __CPU_SET,
__CPU_CLR, and __CPU_ISSET.
* sysdeps/unix/sysv/linux/bits/sched.h: Likewise.
* sysdeps/unix/sysv/linux/sched_getaffinity.c: New file.
* sysdeps/unix/sysv/linux/sched_setaffinity.c: New file.
* include/atomic.h (atomic_exchange_acq): Renamed from atomic_exchange.
(atomic_exchange_rel): New #define.
* sysdeps/ia64/bits/atomic.h: Likewise.
* sysdeps/i386/i486/bits/atomic.h (atomic_exchange_acq): Renamed from
atomic_exchange.
* sysdeps/m68k/m68020/bits/atomic.h: Likewise.
* sysdeps/powerpc/bits/atomic.h: Likewise.
* sysdeps/sparc/sparc32/sparcv9/bits/atomic.h: Likewise.
* sysdeps/sparc/sparc64/bits/atomic.h: Likewise.
* sysdeps/x86_64/bits/atomic.h: Likewise.
* csu/tst-atomic.c: Use atomic_exchange_acq instead of atomic_exchange.
2003-05-10 05:36:37 +00:00
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#define atomic_exchange_acq(mem, value) \
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2003-03-25 22:40:21 +00:00
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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2003-05-13 21:14:28 +00:00
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__result = __arch_atomic_exchange_32_acq (mem, value); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_exchange_64_acq (mem, value); \
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else \
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abort (); \
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__result; \
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})
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#define atomic_exchange_rel(mem, value) \
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_exchange_32_rel (mem, value); \
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2003-03-25 22:40:21 +00:00
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else if (sizeof (*mem) == 8) \
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2003-05-13 21:14:28 +00:00
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__result = __arch_atomic_exchange_64_rel (mem, value); \
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2003-03-25 22:40:21 +00:00
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else \
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abort (); \
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__result; \
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})
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2003-03-20 10:18:24 +00:00
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2003-04-15 18:39:09 +00:00
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#define atomic_exchange_and_add(mem, value) \
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2003-03-25 22:40:21 +00:00
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({ \
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__typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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2003-04-15 18:39:09 +00:00
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__result = __arch_atomic_exchange_and_add_32 (mem, value); \
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2003-03-25 22:40:21 +00:00
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else if (sizeof (*mem) == 8) \
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2003-04-15 18:39:09 +00:00
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__result = __arch_atomic_exchange_and_add_64 (mem, value); \
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2003-03-25 22:40:21 +00:00
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else \
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2003-03-20 10:18:24 +00:00
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abort (); \
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2003-03-25 22:40:21 +00:00
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__result; \
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2003-03-20 10:18:24 +00:00
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})
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/* Decrement *MEM if it is > 0, and return the old value. */
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2003-04-15 18:39:09 +00:00
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#define atomic_decrement_if_positive(mem) \
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2003-03-28 07:17:02 +00:00
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({ __typeof (*(mem)) __result; \
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2003-03-27 23:50:55 +00:00
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if (sizeof (*mem) == 4) \
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2003-03-28 07:17:02 +00:00
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__result = __arch_atomic_decrement_if_positive_32 (mem); \
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2003-03-27 23:50:55 +00:00
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else if (sizeof (*mem) == 8) \
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2003-03-28 07:17:02 +00:00
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__result = __arch_atomic_decrement_if_positive_64 (mem); \
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else \
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2003-03-20 10:18:24 +00:00
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abort (); \
|
2003-03-27 23:50:55 +00:00
|
|
|
__result; \
|
2003-03-20 10:18:24 +00:00
|
|
|
})
|