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Do not raise "inexact" from powerpc32 ceil, floor, trunc (bug 15479).
Continuing fixes for ceil, floor and trunc functions not to raise the "inexact" exception, this patch fixes the versions used on older powerpc32 processors. As was done with the round implementations some time ago, the save of floating-point state is moved after the first floating-point operation on the input to ensure that any "invalid" exception from signaling NaN input is included in the saved state, and then the whole state gets restored rather than just the rounding mode. This has no effect on configurations using the power5+ code, since such processors can do these operations with a single instruction (and those instructions do not set "inexact", so are correct for TS 18661-1 semantics). Tested for powerpc32. [BZ #15479] * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of floating-point state after first floating-point operation on input. Restore full floating-point state instead of just rounding mode. * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
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ChangeLog
13
ChangeLog
@ -1,3 +1,16 @@
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2016-05-25 Joseph Myers <joseph@codesourcery.com>
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[BZ #15479]
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* sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of
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floating-point state after first floating-point operation on
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input. Restore full floating-point state instead of just rounding
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mode.
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* sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise.
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* sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
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2016-05-25 Stefan Liebler <stli@linux.vnet.ibm.com>
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[BZ #19727]
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@ -26,7 +26,6 @@
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.section ".text"
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ENTRY (__ceil)
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -42,6 +41,8 @@ ENTRY (__ceil)
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fabs fp0,fp1
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,2 /* Set rounding mode toward +inf. */
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@ -50,7 +51,8 @@ ENTRY (__ceil)
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fsub fp1,fp1,fp13 /* x-= TWO52; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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bge- cr6,.L9 /* if (x < 0.0) */
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@ -59,7 +61,8 @@ ENTRY (__ceil)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__ceil)
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@ -25,7 +25,6 @@
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.section ".text"
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ENTRY (__ceilf)
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -41,6 +40,8 @@ ENTRY (__ceilf)
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fabs fp0,fp1
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fsubs fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,2 /* Set rounding mode toward +inf. */
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@ -49,7 +50,8 @@ ENTRY (__ceilf)
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fsubs fp1,fp1,fp13 /* x-= TWO23; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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bge- cr6,.L9 /* if (x < 0.0) */
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@ -58,7 +60,8 @@ ENTRY (__ceilf)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__ceilf)
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@ -26,7 +26,6 @@
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.section ".text"
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ENTRY (__floor)
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -42,6 +41,8 @@ ENTRY (__floor)
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fabs fp0,fp1
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,3 /* Set rounding mode toward -inf. */
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@ -50,7 +51,8 @@ ENTRY (__floor)
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fsub fp1,fp1,fp13 /* x-= TWO52; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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bge- cr6,.L9 /* if (x < 0.0) */
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@ -59,7 +61,8 @@ ENTRY (__floor)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__floor)
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@ -25,7 +25,6 @@
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.section ".text"
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ENTRY (__floorf)
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -41,6 +40,8 @@ ENTRY (__floorf)
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fabs fp0,fp1
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fsubs fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,3 /* Set rounding mode toward -inf. */
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@ -49,7 +50,8 @@ ENTRY (__floorf)
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fsubs fp1,fp1,fp13 /* x-= TWO23; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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bge- cr6,.L9 /* if (x < 0.0) */
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@ -58,7 +60,8 @@ ENTRY (__floorf)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__floorf)
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.section ".text"
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ENTRY (__trunc)
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -49,6 +48,8 @@ ENTRY (__trunc)
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fabs fp0,fp1
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fsub fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,1 /* Set rounding toward 0 mode. */
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@ -57,7 +58,8 @@ ENTRY (__trunc)
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fsub fp1,fp1,fp13 /* x-= TWO52; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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bge- cr6,.L9 /* if (x < 0.0) */
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@ -66,7 +68,8 @@ ENTRY (__trunc)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__trunc)
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.section ".text"
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ENTRY (__truncf)
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mffs fp11 /* Save current FPU rounding mode. */
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#ifdef SHARED
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mflr r11
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cfi_register(lr,r11)
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@ -48,6 +47,8 @@ ENTRY (__truncf)
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fabs fp0,fp1
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fsubs fp12,fp13,fp13 /* generate 0.0 */
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fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */
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mffs fp11 /* Save current FPU rounding mode and
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"inexact" state. */
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fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
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bnllr- cr7
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mtfsfi 7,1 /* Set rounding toward 0 mode. */
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@ -56,7 +57,8 @@ ENTRY (__truncf)
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fsubs fp1,fp1,fp13 /* x-= TWO23; */
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fabs fp1,fp1 /* if (x == 0.0) */
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/* x = 0.0; */
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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.L4:
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bge- cr6,.L9 /* if (x < 0.0) */
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@ -65,7 +67,8 @@ ENTRY (__truncf)
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fnabs fp1,fp1 /* if (x == 0.0) */
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/* x = -0.0; */
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.L9:
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mtfsf 0x01,fp11 /* restore previous rounding mode. */
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mtfsf 0xff,fp11 /* Restore previous rounding mode and
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"inexact" state. */
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blr
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END (__truncf)
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