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MIPS: Sync elf.h from binutils
Add new definitions for the MIPS target, specifically: relocation types, machine flags, section type names, and object attribute tags and values. On MIPS64, up to three relocations may be specified within r_info, by the r_type, r_type2, and r_type3 fields, so add new macros to get the respective reloc types for MIPS64.
This commit is contained in:
Ying Huang
Mark Wielaard
parent
c39e5442f1
commit
59dc07637f
140
elf/elf.h
140
elf/elf.h
@ -678,6 +678,9 @@ typedef Elf64_Xword Elf64_Relr;
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#define ELF64_R_SYM(i) ((i) >> 32)
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#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
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#define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
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#define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
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#define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
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#define ELF64_R_INFO(sym,type) ((((Elf64_Xword) (sym)) << 32) + (type))
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/* Program segment header. */
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@ -1685,11 +1688,25 @@ typedef struct
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#define EF_MIPS_PIC 2 /* Contains PIC code. */
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#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence. */
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#define EF_MIPS_XGOT 8
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#define EF_MIPS_64BIT_WHIRL 16
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#define EF_MIPS_UCODE 16
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#define EF_MIPS_ABI2 32
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#define EF_MIPS_ABI_ON32 64
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#define EF_MIPS_OPTIONS_FIRST 0x00000080 /* Process the .MIPS.options
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section first by ld. */
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#define EF_MIPS_32BITMODE 0x00000100 /* Indicates code compiled for
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a 64-bit machine in 32-bit
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mode (regs are 32-bits
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wide). */
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#define EF_MIPS_FP64 512 /* Uses FP64 (12 callee-saved). */
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#define EF_MIPS_NAN2008 1024 /* Uses IEEE 754-2008 NaN encoding. */
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#define EF_MIPS_ARCH_ASE 0x0f000000 /* Architectural Extensions
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used by this file. */
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#define EF_MIPS_ARCH_ASE_MDMX 0x08000000 /* Use MDMX multimedia
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extensions. */
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#define EF_MIPS_ARCH_ASE_M16 0x04000000 /* Use MIPS-16 ISA
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extensions. */
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#define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000 /* Use MICROMIPS ISA
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extensions. */
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#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level. */
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/* Legal values for MIPS architecture level. */
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@ -1703,6 +1720,37 @@ typedef struct
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#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
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#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32r2 code. */
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#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64r2 code. */
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#define EF_MIPS_ARCH_32R6 0x90000000 /* MIPS32r6 code. */
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#define EF_MIPS_ARCH_64R6 0xa0000000 /* MIPS64r6 code. */
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#define EF_MIPS_ABI 0x0000F000 /* The ABI of the file. Also
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see EF_MIPS_ABI2 above. */
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#define EF_MIPS_ABI_O32 0x00001000 /* The original o32 abi. */
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#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended to work on
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64 bit architectures. */
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#define EF_MIPS_ABI_EABI32 0x00003000 /* EABI in 32 bit mode. */
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#define EF_MIPS_ABI_EABI64 0x00004000 /* EABI in 64 bit mode. */
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#define EF_MIPS_MACH 0x00FF0000
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#define EF_MIPS_MACH_3900 0x00810000
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#define EF_MIPS_MACH_4010 0x00820000
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#define EF_MIPS_MACH_4100 0x00830000
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#define EF_MIPS_MACH_4650 0x00850000
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#define EF_MIPS_MACH_4120 0x00870000
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#define EF_MIPS_MACH_4111 0x00880000
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#define EF_MIPS_MACH_SB1 0x008a0000
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#define EF_MIPS_MACH_OCTEON 0x008b0000
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#define EF_MIPS_MACH_XLR 0x008c0000
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#define EF_MIPS_MACH_OCTEON2 0x008d0000
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#define EF_MIPS_MACH_OCTEON3 0x008e0000
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#define EF_MIPS_MACH_5400 0x00910000
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#define EF_MIPS_MACH_5900 0x00920000
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#define EF_MIPS_MACH_IAMR2 0x00930000
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#define EF_MIPS_MACH_5500 0x00980000
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#define EF_MIPS_MACH_9000 0x00990000
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#define EF_MIPS_MACH_LS2E 0x00A00000
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#define EF_MIPS_MACH_LS2F 0x00A10000
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#define EF_MIPS_MACH_GS464 0x00A20000
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#define EF_MIPS_MACH_GS464E 0x00A30000
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#define EF_MIPS_MACH_GS264E 0x00A40000
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/* The following are unofficial names and should not be used. */
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@ -1763,6 +1811,7 @@ typedef struct
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#define SHT_MIPS_EH_REGION 0x70000027
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#define SHT_MIPS_XLATE_OLD 0x70000028
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#define SHT_MIPS_PDR_EXCEPTION 0x70000029
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#define SHT_MIPS_ABIFLAGS 0x7000002a
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#define SHT_MIPS_XHASH 0x7000002b
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/* Legal values for sh_flags field of Elf32_Shdr. */
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@ -1931,10 +1980,68 @@ typedef struct
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#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
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#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
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#define R_MIPS_GLOB_DAT 51
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#define R_MIPS_PC21_S2 60
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#define R_MIPS_PC26_S2 61
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#define R_MIPS_PC18_S3 62
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#define R_MIPS_PC19_S2 63
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#define R_MIPS_PCHI16 64
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#define R_MIPS_PCLO16 65
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#define R_MIPS16_26 100
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#define R_MIPS16_GPREL 101
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#define R_MIPS16_GOT16 102
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#define R_MIPS16_CALL16 103
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#define R_MIPS16_HI16 104
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#define R_MIPS16_LO16 105
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#define R_MIPS16_TLS_GD 106
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#define R_MIPS16_TLS_LDM 107
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#define R_MIPS16_TLS_DTPREL_HI16 108
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#define R_MIPS16_TLS_DTPREL_LO16 109
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#define R_MIPS16_TLS_GOTTPREL 110
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#define R_MIPS16_TLS_TPREL_HI16 111
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#define R_MIPS16_TLS_TPREL_LO16 112
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#define R_MIPS16_PC16_S1 113
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#define R_MIPS_COPY 126
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#define R_MIPS_JUMP_SLOT 127
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#define R_MIPS_RELATIVE 128
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#define R_MICROMIPS_26_S1 133
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#define R_MICROMIPS_HI16 134
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#define R_MICROMIPS_LO16 135
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#define R_MICROMIPS_GPREL16 136
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#define R_MICROMIPS_LITERAL 137
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#define R_MICROMIPS_GOT16 138
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#define R_MICROMIPS_PC7_S1 139
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#define R_MICROMIPS_PC10_S1 140
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#define R_MICROMIPS_PC16_S1 141
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#define R_MICROMIPS_CALL16 142
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#define R_MICROMIPS_GOT_DISP 145
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#define R_MICROMIPS_GOT_PAGE 146
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#define R_MICROMIPS_GOT_OFST 147
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#define R_MICROMIPS_GOT_HI16 148
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#define R_MICROMIPS_GOT_LO16 149
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#define R_MICROMIPS_SUB 150
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#define R_MICROMIPS_HIGHER 151
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#define R_MICROMIPS_HIGHEST 152
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#define R_MICROMIPS_CALL_HI16 153
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#define R_MICROMIPS_CALL_LO16 154
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#define R_MICROMIPS_SCN_DISP 155
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#define R_MICROMIPS_JALR 156
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#define R_MICROMIPS_HI0_LO16 157
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#define R_MICROMIPS_TLS_GD 162
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#define R_MICROMIPS_TLS_LDM 163
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#define R_MICROMIPS_TLS_DTPREL_HI16 164
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#define R_MICROMIPS_TLS_DTPREL_LO16 165
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#define R_MICROMIPS_TLS_GOTTPREL 166
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#define R_MICROMIPS_TLS_TPREL_HI16 169
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#define R_MICROMIPS_TLS_TPREL_LO16 170
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#define R_MICROMIPS_GPREL7_S2 172
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#define R_MICROMIPS_PC23_S2 173
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#define R_MIPS_PC32 248
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#define R_MIPS_EH 249
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#define R_MIPS_GNU_REL16_S2 250
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#define R_MIPS_GNU_VTINHERIT 253
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#define R_MIPS_GNU_VTENTRY 254
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/* Keep this the last entry. */
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#define R_MIPS_NUM 128
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#define R_MIPS_NUM 255
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/* Legal values for p_type field of Elf32_Phdr. */
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@ -2142,6 +2249,30 @@ typedef struct
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/* Masks for the flags1 word of an ABI flags structure. */
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#define MIPS_AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */
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/* Object attribute tags. */
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enum
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{
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/* 0-3 are generic. */
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/* Floating-point ABI used by this object file. */
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Tag_GNU_MIPS_ABI_FP = 4,
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/* MSA ABI used by this object file. */
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Tag_GNU_MIPS_ABI_MSA = 8,
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};
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/* Object attribute values. */
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enum
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{
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/* Values defined for Tag_GNU_MIPS_ABI_MSA. */
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/* Not tagged or not using any ABIs affected by the differences. */
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Val_GNU_MIPS_ABI_MSA_ANY = 0,
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/* Using 128-bit MSA. */
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Val_GNU_MIPS_ABI_MSA_128 = 1,
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};
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/* Object attribute values. */
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enum
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{
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@ -2161,8 +2292,11 @@ enum
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Val_GNU_MIPS_ABI_FP_64 = 6,
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/* Using -mips32r2 -mfp64 -mno-odd-spreg. */
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Val_GNU_MIPS_ABI_FP_64A = 7,
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/* This is reserved for backward-compatibility with an earlier
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implementation of the MIPS NaN2008 functionality. */
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Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
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/* Maximum allocated FP ABI value. */
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Val_GNU_MIPS_ABI_FP_MAX = 7
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Val_GNU_MIPS_ABI_FP_MAX = 8
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};
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/* HPPA specific definitions. */
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