mirror of
https://sourceware.org/git/glibc.git
synced 2024-11-25 14:30:06 +00:00
Also treat model numbers 0x5a/0x5d as Silvermont
This commit is contained in:
parent
ede0236c86
commit
972af9e8dd
@ -1,7 +1,8 @@
|
||||
2015-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
|
||||
Treat model numbers 0x4a/0x4d as Intel Silvermont architecture.
|
||||
Treat model numbers 0x4a/0x4d/0x5a/0x5d as Intel Silvermont
|
||||
architecture.
|
||||
|
||||
2015-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
|
@ -81,6 +81,8 @@ __init_cpu_features (void)
|
||||
case 0x37:
|
||||
case 0x4a:
|
||||
case 0x4d:
|
||||
case 0x5a:
|
||||
case 0x5d:
|
||||
/* Unaligned load versions are faster than SSSE3
|
||||
on Silvermont. */
|
||||
#if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop
|
||||
|
Loading…
Reference in New Issue
Block a user