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Also treat model numbers 0x5a/0x5d as Silvermont

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H.J. Lu 2015-01-23 18:52:45 -08:00
parent ede0236c86
commit 972af9e8dd
2 changed files with 4 additions and 1 deletions
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3
ChangeLog
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@ -1,7 +1,8 @@
2015-01-23 H.J. Lu <hongjiu.lu@intel.com> 2015-01-23 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
Treat model numbers 0x4a/0x4d as Intel Silvermont architecture. Treat model numbers 0x4a/0x4d/0x5a/0x5d as Intel Silvermont
architecture.
2015-01-23 H.J. Lu <hongjiu.lu@intel.com> 2015-01-23 H.J. Lu <hongjiu.lu@intel.com>

2
sysdeps/x86_64/multiarch/init-arch.c
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@ -81,6 +81,8 @@ __init_cpu_features (void)
case 0x37: case 0x37:
case 0x4a: case 0x4a:
case 0x4d: case 0x4d:
case 0x5a:
case 0x5d:
/* Unaligned load versions are faster than SSSE3 /* Unaligned load versions are faster than SSSE3
on Silvermont. */ on Silvermont. */
#if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop #if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop