Commit Graph

10 Commits

Author SHA1 Message Date
Joseph Myers
bfff8b1bec Update copyright dates with scripts/update-copyrights. 2017-01-01 00:14:16 +00:00
Stefan Liebler
e9b424881a S390: Do not set FE_INEXACT with feraiseexcept (FE_OWERFLOW|FE_UNDERFLOW).
On s390 feraiseexcept (FE_OVERFLOW|FE_UNDERFLOW) sets FE_INEXACT, too.
This patch uses z196 zarch load rounded instruction which can suppress
FE_INEXACT exception if gcc has z196 support in used configuration.
Otherwise FE_INEXACT flag is set as before. The gcc support is tested
in a new configure-check.

A comment in fsetexcptflg.c is corrected as new exceptions are not
executed with the next floating-point instruction if fpc is set with
_FPU_SETCW macro. It seems the comment was copied e.g. from
sysdeps/x86_64/fpu/fsetexcptflg.c file.

ChangeLog:

	* config.h.in (HAVE_S390_MIN_Z196_ZARCH_ASM_SUPPORT):
	New undefine.
	* sysdeps/s390/configure.ac: Add test for z196 zarch support.
	* sysdeps/s390/configure: Regenerated.
	* sysdeps/s390/fpu/fraiseexcpt.c (__feraiseexcept): Use ledbra
	instruction for raising over-/underflow if z196 zarch is supported
	by default.
	* sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag):
	Correct comment.
2016-08-31 14:54:55 +02:00
Joseph Myers
f7a9f785e5 Update copyright dates with scripts/update-copyrights. 2016-01-04 16:05:18 +00:00
Stefan Liebler
5d96fe8c0d S390: Fix handling of DXC-byte in FPC-register.
On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)-
register contains a code of the last occured exception.
If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the
ieee-exception flag bits.
The current implementation always uses these bits as ieee-exception flag bits.
fetestexcept() reports any exception after the first usage of a
vector-instruction in a process, because it raises an "vector instruction
exception" with DXC-code 0xFE.
This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled
if bits 6 and 7 are zero.

The #define _FPU_RESERVED is extended by the DXC-Byte.
Otherwise the tests math/test-fpucw-static and math/test-fpucw-ieee-static
fails, because DXC-Byte contains the vector instruction exception when reaching
main(). This exception was triggered by strrchr() call in __init_misc().
__init_misc() is called after __setfpucw () in __libc_init_first().

The field __ieee_instruction_pointer in struct fenv_t is renamed to __unused
because it is a relict from commit "Remove PTRACE_PEEKUSER"
(87b9b50f0d) and isn´t used anymore.

ChangeLog:

	[BZ #18610]
	* sysdeps/s390/fpu/bits/fenv.h (fenv_t): Rename
	__ieee_instruction_pointer to __unused.
	* sysdeps/s390/fpu/fesetenv.c (__fesetenv): Remove usage of
	__ieee_instruction_pointer.
	* sysdeps/s390/fpu/fclrexcpt.c (feclearexcept): Fix dxc-field handling.
	* sysdeps/s390/fpu/fgetexcptflg.c (fegetexceptflag): Likewise.
	* sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag): Likewise.
	* sysdeps/s390/fpu/ftestexcept.c (fetestexcept): Likewise.
	* sysdeps/s390/fpu/fpu_control.h (_FPU_RESERVED):
	Mark dxc-field as reserved.
2015-08-26 10:26:18 +02:00
Joseph Myers
b168057aaa Update copyright dates with scripts/update-copyrights. 2015-01-02 16:29:47 +00:00
Allan McRae
d4697bc93d Update copyright notices with scripts/update-copyrights 2014-01-01 22:00:23 +10:00
Joseph Myers
568035b787 Update copyright notices with scripts/update-copyrights. 2013-01-02 19:05:09 +00:00
Paul Eggert
59ba27a63a Replace FSF snail mail address with URLs. 2012-02-09 23:18:22 +00:00
Andreas Jaeger
41bdb6e20c Update to LGPL v2.1.
2001-07-06  Paul Eggert  <eggert@twinsun.com>

	* manual/argp.texi: Remove ignored LGPL copyright notice; it's
	not appropriate for documentation anyway.
	* manual/libc-texinfo.sh: "Library General Public License" ->
	"Lesser General Public License".

2001-07-06  Andreas Jaeger  <aj@suse.de>

	* All files under GPL/LGPL version 2: Place under LGPL version
	2.1.
2001-07-06 04:58:11 +00:00
Andreas Jaeger
528be9fe8e Add sys/procfs.h. 2000-08-21 17:06:46 +00:00