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The powerpc implementations of fabsl for ldbl-128ibm (both powerpc32 and powerpc64) wrongly raise the "invalid" exception for sNaN arguments. fabs functions should be quiet for all inputs including signaling NaNs. The problem is the use of a comparison instruction fcmpu to determine if the high part of the argument is negative and so the low part needs to be negated; such instructions raise "invalid" for sNaNs. There is a pure integer implementation of fabsl in sysdeps/ieee754/ldbl-128ibm/s_fabsl.c. However, it's not necessary to use it to avoid such exceptions. The fsel instruction does not raise exceptions for sNaNs, and can be used in place of the original comparison. (Note that if the high part is zero or a NaN, it does not matter whether the low part is negated; the choice of whether the low part of a zero is +0 or -0 does not affect the value, and the low part of a NaN does not affect the value / payload either.) The condition in GCC for fsel to be available is TARGET_PPC_GFXOPT, corresponding to the _ARCH_PPCGR predefined macro. fsel is available on all 64-bit processors supported by GCC. A few 32-bit processors supported by GCC do not have TARGET_PPC_GFXOPT despite having hard float support. To support those processors, integer code (similar to that in copysignl) is included for the !_ARCH_PPCGR case for powerpc32. Tested for powerpc32 (configurations with and without _ARCH_PPCGR) and powerpc64. [BZ #20157] * sysdeps/powerpc/powerpc32/fpu/s_fabsl.S (__fabsl): Use fsel to determine whether to negate low half if [_ARCH_PPCGR], and integer comparison otherwise. * sysdeps/powerpc/powerpc64/fpu/s_fabsl.S (__fabsl): Use fsel to determine whether to negate low half. |
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