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7d92b78723
Current ARM soft-float implementation is violating the RTABI (http://infocenter.arm.com/help/topic/com.arm.doc.ihi0043d/IHI0043D_rtabi.pdf) Section 4.1.1.1: When not otherwise specified by IEEE 754, the result on an invalid operation should be the quiet NaN bit pattern with only the most significant bit of the significand set, and all other significand bits zero. This patch fixes it by setting _FP_NANFRAC_* to zero. Ran make check test with -mfloat-abi=soft. No regression. * sysdeps/arm/soft-fp/sfp-machine.h (_FP_NANFRAC_S, _FP_NANFRAC_D) (_FP_NANFRAC_Q): Set to zero.
52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
#define _FP_W_TYPE_SIZE 32
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#define _FP_W_TYPE unsigned long
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#define _FP_WS_TYPE signed long
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#define _FP_I_TYPE long
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y) \
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_FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_DW_S(R,X,Y) \
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_FP_MUL_MEAT_DW_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_DW_D(R,X,Y) \
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_FP_MUL_MEAT_DW_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_DW_Q(R,X,Y) \
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_FP_MUL_MEAT_DW_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
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#define _FP_NANFRAC_S 0
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#define _FP_NANFRAC_D 0, 0
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#define _FP_NANFRAC_Q 0, 0, 0, 0
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#define _FP_NANSIGN_S 0
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#define _FP_NANSIGN_D 0
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#define _FP_NANSIGN_Q 0
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#define _FP_KEEPNANFRACP 1
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#define _FP_QNANNEGATEDP 0
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/* Someone please check this. */
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#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do { \
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if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
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&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
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{ \
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R##_s = Y##_s; \
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_FP_FRAC_COPY_##wc(R,Y); \
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} \
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else \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc(R,X); \
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} \
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R##_c = FP_CLS_NAN; \
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} while (0)
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#define _FP_TININESS_AFTER_ROUNDING 0
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