Stefan Liebler 5d96fe8c0d S390: Fix handling of DXC-byte in FPC-register. ... On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)- register contains a code of the last occured exception. If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the ieee-exception flag bits. The current implementation always uses these bits as ieee-exception flag bits. fetestexcept() reports any exception after the first usage of a vector-instruction in a process, because it raises an "vector instruction exception" with DXC-code 0xFE. This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled if bits 6 and 7 are zero. The #define _FPU_RESERVED is extended by the DXC-Byte. Otherwise the tests math/test-fpucw-static and math/test-fpucw-ieee-static fails, because DXC-Byte contains the vector instruction exception when reaching main(). This exception was triggered by strrchr() call in __init_misc(). __init_misc() is called after __setfpucw () in __libc_init_first(). The field __ieee_instruction_pointer in struct fenv_t is renamed to __unused because it is a relict from commit "Remove PTRACE_PEEKUSER" (87b9b50f0d) and isn´t used anymore. ChangeLog: [BZ #18610] * sysdeps/s390/fpu/bits/fenv.h (fenv_t): Rename __ieee_instruction_pointer to __unused. * sysdeps/s390/fpu/fesetenv.c (__fesetenv): Remove usage of __ieee_instruction_pointer. * sysdeps/s390/fpu/fclrexcpt.c (feclearexcept): Fix dxc-field handling. * sysdeps/s390/fpu/fgetexcptflg.c (fegetexceptflag): Likewise. * sysdeps/s390/fpu/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/s390/fpu/ftestexcept.c (fetestexcept): Likewise. * sysdeps/s390/fpu/fpu_control.h (_FPU_RESERVED): Mark dxc-field as reserved.		2015-08-26 10:26:18 +02:00
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fenv.h	S390: Fix handling of DXC-byte in FPC-register.	2015-08-26 10:26:18 +02:00
mathinline.h	Update copyright dates with scripts/update-copyrights.	2015-01-02 16:29:47 +00:00