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b309f058cf
General purpose registers in mcontext_t structure are 8 bytes long for both MIPS32/MIPS64. get/set/make/swap context implementations for MIPS O32 incorrectly assume that general purpose registers in this structure are 4 bytes long. This patch is fixing that. Tested for MIPS O32 LE and BE. Compared objdump of modified functions for mips n32 and mips n64. [BZ #21548] * sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/Makefile: Include new test for mips o32. * sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c: Added new test for mips o32. * sysdeps/unix/sysv/linux/mips/setcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.
162 lines
4.4 KiB
ArmAsm
162 lines
4.4 KiB
ArmAsm
/* Save current context.
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Copyright (C) 2009-2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Maciej W. Rozycki <macro@codesourcery.com>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <sys/asm.h>
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#include <sys/fpregdef.h>
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#include <sys/regdef.h>
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#include "ucontext_i.h"
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/* int getcontext (ucontext_t *ucp) */
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.text
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.set nomips16
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LOCALSZ = 0
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MASK = 0x00000000
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#ifdef __PIC__
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LOCALSZ = 1 /* save gp */
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# if _MIPS_SIM != _ABIO32
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MASK = 0x10000000
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# endif
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#endif
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FRAMESZ = ((LOCALSZ * SZREG) + ALSZ) & ALMASK
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GPOFF = FRAMESZ - (1 * SZREG)
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MCONTEXT_GREGSZ = 8
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#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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MCONTEXT_GREGOFF = 4
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#else
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MCONTEXT_GREGOFF = 0
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#endif
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NESTED (__getcontext, FRAMESZ, ra)
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.mask MASK, 0
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.fmask 0x00000000, 0
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#ifdef __PIC__
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SETUP_GP
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move a2, sp
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# define _SP a2
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# if _MIPS_SIM != _ABIO32
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move a3, gp
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# define _GP a3
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# endif
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PTR_ADDIU sp, -FRAMESZ
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cfi_adjust_cfa_offset (FRAMESZ)
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SETUP_GP64_STACK (GPOFF, __getcontext)
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SAVE_GP (GPOFF)
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#else /* ! __PIC__ */
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# define _SP sp
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# define _GP gp
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#endif /* ! __PIC__ */
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#ifdef PROF
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.set noat
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move AT, ra
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jal _mcount
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.set at
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#endif
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/* Store a magic flag. */
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li v1, 1
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/* zero */
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REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
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REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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#endif
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REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
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REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
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#ifdef __mips_hard_float
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# if _MIPS_SIM == _ABI64
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s.d fs0, (24 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs1, (25 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs2, (26 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs3, (27 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs5, (29 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs6, (30 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs7, (31 * SZREG + MCONTEXT_FPREGS)(a0)
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# else /* _MIPS_SIM != _ABI64 */
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s.d fs0, (20 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs1, (22 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs2, (24 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs3, (26 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs4, (28 * SZREG + MCONTEXT_FPREGS)(a0)
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s.d fs5, (30 * SZREG + MCONTEXT_FPREGS)(a0)
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# endif /* _MIPS_SIM != _ABI64 */
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cfc1 v1, fcr31
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sw v1, MCONTEXT_FPC_CSR(a0)
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#endif /* __mips_hard_float */
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/* rt_sigprocmask (SIG_BLOCK, NULL, &ucp->uc_sigmask, _NSIG8) */
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li a3, _NSIG8
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PTR_ADDU a2, a0, UCONTEXT_SIGMASK
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move a1, zero
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li a0, SIG_BLOCK
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li v0, SYS_ify (rt_sigprocmask)
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syscall
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bnez a3, 99f
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cfi_remember_state
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#ifdef __PIC__
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RESTORE_GP64_STACK
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PTR_ADDIU sp, FRAMESZ
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cfi_adjust_cfa_offset (-FRAMESZ)
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#endif
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move v0, zero
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jr ra
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99:
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cfi_restore_state
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#ifdef __PIC__
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PTR_LA t9, JUMPTARGET (__syscall_error)
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RESTORE_GP64_STACK
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PTR_ADDIU sp, FRAMESZ
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cfi_adjust_cfa_offset (-FRAMESZ)
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jr t9
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#else /* ! __PIC__ */
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j JUMPTARGET (__syscall_error)
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#endif /* ! __PIC__ */
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PSEUDO_END (__getcontext)
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weak_alias (__getcontext, getcontext)
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