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[turbofan] Skip write barriers when storing smi.

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On 64-bit targets, we can skip the write barrier for Store nodes if the
input is ChangeInt32ToTagged, because the value being stored is
definitely represented as a smi then.

R=jarin@chromium.org

Review URL: https://codereview.chromium.org/968113002

Cr-Commit-Position: refs/heads/master@{#26934}
This commit is contained in:
Benedikt Meurer 2015-03-02 10:08:46 +01:00
parent c791d84112
commit 155278d6f2
3 changed files with 26 additions and 5 deletions
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14
src/compiler/simplified-lowering.cc
View File

@ -1135,10 +1135,14 @@ Node* SimplifiedLowering::OffsetMinusTagConstant(int32_t offset) {
}
static WriteBarrierKind ComputeWriteBarrierKind(BaseTaggedness base_is_tagged,
MachineType representation,
Type* type) {
WriteBarrierKind SimplifiedLowering::ComputeWriteBarrierKind(
BaseTaggedness base_is_tagged, MachineType representation, Node* value) {
// TODO(turbofan): skip write barriers for Smis, etc.
if (machine()->Is64() && value->opcode() == IrOpcode::kChangeInt32ToTagged) {
// TODO(bmeurer): Remove this hack once we have a way to represent "sminess"
// of values, either in types or representations.
return kNoWriteBarrier;
}
if (base_is_tagged == kTaggedBase &&
RepresentationOf(representation) == kRepTagged) {
// Write barriers are only for writes into heap objects (i.e. tagged base).
@ -1159,7 +1163,7 @@ void SimplifiedLowering::DoLoadField(Node* node) {
void SimplifiedLowering::DoStoreField(Node* node) {
const FieldAccess& access = FieldAccessOf(node->op());
WriteBarrierKind kind = ComputeWriteBarrierKind(
access.base_is_tagged, access.machine_type, access.type);
access.base_is_tagged, access.machine_type, node->InputAt(1));
node->set_op(
machine()->Store(StoreRepresentation(access.machine_type, kind)));
Node* offset = jsgraph()->IntPtrConstant(access.offset - access.tag());
@ -1267,7 +1271,7 @@ void SimplifiedLowering::DoStoreElement(Node* node) {
node->set_op(machine()->Store(StoreRepresentation(
access.machine_type,
ComputeWriteBarrierKind(access.base_is_tagged, access.machine_type,
access.type))));
node->InputAt(2)))));
node->ReplaceInput(1, ComputeIndex(access, node->InputAt(1)));
}

3
src/compiler/simplified-lowering.h
View File

@ -57,6 +57,9 @@ class SimplifiedLowering FINAL {
Node* IsTagged(Node* node);
Node* Untag(Node* node);
Node* OffsetMinusTagConstant(int32_t offset);
WriteBarrierKind ComputeWriteBarrierKind(BaseTaggedness base_is_tagged,
MachineType representation,
Node* value);
Node* ComputeIndex(const ElementAccess& access, Node* const key);
Node* StringComparison(Node* node, bool requires_ordering);
Node* Int32Div(Node* const node);

14
test/cctest/compiler/test-simplified-lowering.cc
View File

@ -1463,6 +1463,20 @@ TEST(LowerStoreField_to_store) {
}
CHECK_EQ(kMachineReps[i], rep.machine_type());
}
if (t.machine()->Is64()) {
FieldAccess access = {kTaggedBase, FixedArrayBase::kHeaderSize,
Handle<Name>::null(), Type::Any(), kMachAnyTagged};
Node* val = t.graph()->NewNode(t.simplified()->ChangeInt32ToTagged(), t.p0);
Node* store = t.graph()->NewNode(t.simplified()->StoreField(access), t.p0,
val, t.start, t.start);
t.Effect(store);
t.Lower();
CHECK_EQ(IrOpcode::kStore, store->opcode());
CHECK_EQ(val, store->InputAt(2));
StoreRepresentation rep = OpParameter<StoreRepresentation>(store);
CHECK_EQ(kNoWriteBarrier, rep.write_barrier_kind());
}
}