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[x64] Verify disassembly of SSE4_2 instructions

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R=gdeepti@chromium.org

Bug: v8:12207
Change-Id: I3eafe4b2cf2d37fd4f8a9792fb96bf7b92a4c61b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3208456
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/main@{#77292}
This commit is contained in:
Ng Zhi An 2021-10-06 15:59:16 -07:00 committed by V8 LUCI CQ
parent 61203cb9b7
commit 166dde5d2f
1 changed files with 17 additions and 13 deletions
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30
test/cctest/test-disasm-x64.cc
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@ -112,19 +112,6 @@ TEST(DisasmX64) {
__ j(less_equal, &Ljcc);
__ j(greater, &Ljcc);
#define EMIT_SSE34_INSTR(instruction, notUsed1, notUsed2, notUsed3, notUsed4) \
__ instruction(xmm5, xmm1); \
__ instruction(xmm5, Operand(rdx, 4));
{
if (CpuFeatures::IsSupported(SSE4_2)) {
CpuFeatureScope scope(&assm, SSE4_2);
SSE4_2_INSTRUCTION_LIST(EMIT_SSE34_INSTR)
}
}
#undef EMIT_SSE34_INSTR
// AVX instruction
{
if (CpuFeatures::IsSupported(AVX)) {
@ -1311,6 +1298,23 @@ UNINITIALIZED_TEST(DisasmX64CheckOutputSSE4_1) {
#undef COMPARE_SSE4_EXTRACT_INSTR
}
UNINITIALIZED_TEST(DisasmX64CheckOutputSSE4_2) {
if (!CpuFeatures::IsSupported(SSE4_2)) {
return;
}
DisassemblerTester t;
std::string actual, exp;
CpuFeatureScope scope(&t.assm_, SSE4_2);
#define COMPARE_SSE4_2_INSTR(instruction, _, __, ___, ____) \
exp = #instruction " xmm5,xmm1"; \
COMPARE_INSTR(exp, instruction(xmm5, xmm1)); \
exp = #instruction " xmm5,[rbx+rcx*4+0x2710]"; \
COMPARE_INSTR(exp, instruction(xmm5, Operand(rbx, rcx, times_4, 10000)));
SSE4_2_INSTRUCTION_LIST(COMPARE_SSE4_2_INSTR)
}
UNINITIALIZED_TEST(DisasmX64YMMRegister) {
if (!CpuFeatures::IsSupported(AVX)) return;
DisassemblerTester t;