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MIPS: Fix transcendental cache on ARM in optimized code.

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Port r12086 (84066033)

BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com/10782023
Patch from Akos Palfi <palfia@homejinni.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12132 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
yangguo@chromium.org 2012-07-18 13:50:19 +00:00
parent d340db9135
commit 25d4eeaf98
1 changed files with 6 additions and 6 deletions
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12
src/mips/code-stubs-mips.cc
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@ -3533,23 +3533,23 @@ void TranscendentalCacheStub::Generate(MacroAssembler* masm) {
1,
1);
} else {
if (!CpuFeatures::IsSupported(FPU)) UNREACHABLE();
ASSERT(CpuFeatures::IsSupported(FPU));
CpuFeatures::Scope scope(FPU);
Label no_update;
Label skip_cache;
// Call C function to calculate the result and update the cache.
// Register a0 holds precalculated cache entry address; preserve
// it on the stack and pop it into register cache_entry after the
// call.
__ Push(cache_entry, a2, a3);
// a0: precalculated cache entry address.
// a2 and a3: parts of the double value.
// Store a0, a2 and a3 on stack for later before calling C function.
__ Push(a3, a2, cache_entry);
GenerateCallCFunction(masm, scratch0);
__ GetCFunctionDoubleResult(f4);
// Try to update the cache. If we cannot allocate a
// heap number, we return the result without updating.
__ Pop(cache_entry, a2, a3);
__ Pop(a3, a2, cache_entry);
__ LoadRoot(t1, Heap::kHeapNumberMapRootIndex);
__ AllocateHeapNumber(t2, scratch0, scratch1, t1, &no_update);
__ sdc1(f4, FieldMemOperand(t2, HeapNumber::kValueOffset));