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[loong64][mips64][fastcall] Support EnforceRange annotation

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Port commit 8559a04f4c

Change-Id: I74bbbaddb196bba0945cc857e708534e4eb3f9b3
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3747466
Reviewed-by: Maya Lekova <mslekova@chromium.org>
Commit-Queue: Maya Lekova <mslekova@chromium.org>
Auto-Submit: Liu Yu <liuyu@loongson.cn>
Cr-Commit-Position: refs/heads/main@{#81551}
This commit is contained in:
Liu Yu 2022-07-06 16:38:48 +08:00 committed by V8 LUCI CQ
parent f4b58389f6
commit 2ac469ae5d
6 changed files with 107 additions and 1 deletions
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4
src/compiler/backend/code-generator-impl.h
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@ -116,6 +116,10 @@ class InstructionOperandConverter {
return ToDoubleRegister(instr_->Output());
}
DoubleRegister TempDoubleRegister(size_t index) {
return ToDoubleRegister(instr_->TempAt(index));
}
Simd128Register OutputSimd128Register() {
return ToSimd128Register(instr_->Output());
}

19
src/compiler/backend/loong64/code-generator-loong64.cc
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@ -1340,6 +1340,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
FPURegister scratch = kScratchDoubleReg;
__ ftintrz_w_d(scratch, i.InputDoubleRegister(0));
__ movfr2gr_s(i.OutputRegister(), scratch);
if (instr->OutputCount() > 1) {
// Check for inputs below INT32_MIN and NaN.
__ li(i.OutputRegister(1), 1);
__ Move(i.TempDoubleRegister(0), static_cast<double>(INT32_MIN));
__ CompareF64(i.TempDoubleRegister(0), i.InputDoubleRegister(0), CLE);
__ LoadZeroIfNotFPUCondition(i.OutputRegister(1));
__ Move(i.TempDoubleRegister(0), static_cast<double>(INT32_MAX) + 1);
__ CompareF64(i.TempDoubleRegister(0), i.InputDoubleRegister(0), CLE);
__ LoadZeroIfFPUCondition(i.OutputRegister(1));
}
break;
}
case kLoong64Float32ToInt32: {
@ -1407,6 +1417,15 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kLoong64Float64ToUint32: {
FPURegister scratch = kScratchDoubleReg;
__ Ftintrz_uw_d(i.OutputRegister(), i.InputDoubleRegister(0), scratch);
if (instr->OutputCount() > 1) {
__ li(i.OutputRegister(1), 1);
__ Move(i.TempDoubleRegister(0), static_cast<double>(-1.0));
__ CompareF64(i.TempDoubleRegister(0), i.InputDoubleRegister(0), CLT);
__ LoadZeroIfNotFPUCondition(i.OutputRegister(1));
__ Move(i.TempDoubleRegister(0), static_cast<double>(UINT32_MAX) + 1);
__ CompareF64(i.TempDoubleRegister(0), i.InputDoubleRegister(0), CLE);
__ LoadZeroIfFPUCondition(i.OutputRegister(1));
}
break;
}
case kLoong64Float32ToUint32: {

32
src/compiler/backend/loong64/instruction-selector-loong64.cc
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@ -1353,6 +1353,38 @@ void InstructionSelector::VisitTryTruncateFloat64ToUint64(Node* node) {
Emit(kLoong64Float64ToUint64, output_count, outputs, 1, inputs);
}
void InstructionSelector::VisitTryTruncateFloat64ToInt32(Node* node) {
Loong64OperandGenerator g(this);
InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0))};
InstructionOperand temps[] = {g.TempDoubleRegister()};
InstructionOperand outputs[2];
size_t output_count = 0;
outputs[output_count++] = g.DefineAsRegister(node);
Node* success_output = NodeProperties::FindProjection(node, 1);
if (success_output) {
outputs[output_count++] = g.DefineAsRegister(success_output);
}
Emit(kLoong64Float64ToInt32, output_count, outputs, 1, inputs, 1, temps);
}
void InstructionSelector::VisitTryTruncateFloat64ToUint32(Node* node) {
Loong64OperandGenerator g(this);
InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0))};
InstructionOperand temps[] = {g.TempDoubleRegister()};
InstructionOperand outputs[2];
size_t output_count = 0;
outputs[output_count++] = g.DefineAsRegister(node);
Node* success_output = NodeProperties::FindProjection(node, 1);
if (success_output) {
outputs[output_count++] = g.DefineAsRegister(success_output);
}
Emit(kLoong64Float64ToUint32, output_count, outputs, 1, inputs, 1, temps);
}
void InstructionSelector::VisitBitcastWord32ToWord64(Node* node) {
UNIMPLEMENTED();
}

19
src/compiler/backend/mips64/code-generator-mips64.cc
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@ -1462,6 +1462,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
// Other arches use round to zero here, so we follow.
__ trunc_w_d(scratch, i.InputDoubleRegister(0));
__ mfc1(i.OutputRegister(), scratch);
if (instr->OutputCount() > 1) {
// Check for inputs below INT32_MIN and NaN.
__ li(i.OutputRegister(1), 1);
__ Move(i.TempDoubleRegister(0), static_cast<double>(INT32_MIN));
__ CompareF64(LE, i.TempDoubleRegister(0), i.InputDoubleRegister(0));
__ LoadZeroIfNotFPUCondition(i.OutputRegister(1));
__ Move(i.TempDoubleRegister(0), static_cast<double>(INT32_MAX) + 1);
__ CompareF64(LE, i.TempDoubleRegister(0), i.InputDoubleRegister(0));
__ LoadZeroIfFPUCondition(i.OutputRegister(1));
}
break;
}
case kMips64FloorWS: {
@ -1546,6 +1556,15 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kMips64TruncUwD: {
FPURegister scratch = kScratchDoubleReg;
__ Trunc_uw_d(i.OutputRegister(), i.InputDoubleRegister(0), scratch);
if (instr->OutputCount() > 1) {
__ li(i.OutputRegister(1), 1);
__ Move(i.TempDoubleRegister(0), static_cast<double>(-1.0));
__ CompareF64(LT, i.TempDoubleRegister(0), i.InputDoubleRegister(0));
__ LoadZeroIfNotFPUCondition(i.OutputRegister(1));
__ Move(i.TempDoubleRegister(0), static_cast<double>(UINT32_MAX) + 1);
__ CompareF64(LE, i.TempDoubleRegister(0), i.InputDoubleRegister(0));
__ LoadZeroIfFPUCondition(i.OutputRegister(1));
}
break;
}
case kMips64TruncUwS: {

32
src/compiler/backend/mips64/instruction-selector-mips64.cc
View File

@ -1436,6 +1436,38 @@ void InstructionSelector::VisitTryTruncateFloat64ToUint64(Node* node) {
Emit(kMips64TruncUlD, output_count, outputs, 1, inputs);
}
void InstructionSelector::VisitTryTruncateFloat64ToInt32(Node* node) {
Mips64OperandGenerator g(this);
InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0))};
InstructionOperand temps[] = {g.TempDoubleRegister()};
InstructionOperand outputs[2];
size_t output_count = 0;
outputs[output_count++] = g.DefineAsRegister(node);
Node* success_output = NodeProperties::FindProjection(node, 1);
if (success_output) {
outputs[output_count++] = g.DefineAsRegister(success_output);
}
Emit(kMips64TruncWD, output_count, outputs, 1, inputs, 1, temps);
}
void InstructionSelector::VisitTryTruncateFloat64ToUint32(Node* node) {
Mips64OperandGenerator g(this);
InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0))};
InstructionOperand temps[] = {g.TempDoubleRegister()};
InstructionOperand outputs[2];
size_t output_count = 0;
outputs[output_count++] = g.DefineAsRegister(node);
Node* success_output = NodeProperties::FindProjection(node, 1);
if (success_output) {
outputs[output_count++] = g.DefineAsRegister(success_output);
}
Emit(kMips64TruncUwD, output_count, outputs, 1, inputs, 1, temps);
}
void InstructionSelector::VisitBitcastWord32ToWord64(Node* node) {
UNIMPLEMENTED();
}

2
test/mjsunit/mjsunit.status
View File

@ -1713,7 +1713,7 @@
}], # arch != x64
##############################################################################
['arch != x64 and arch != arm64', {
['arch != x64 and arch != arm64 and arch != loong64 and arch != mips64', {
# Tests that include types only supported on x64/arm64.
'compiler/fast-api-sequences-x64': [SKIP],
'compiler/fast-api-annotations': [SKIP],