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[mips] Fix kArchStackPointerGreaterThan

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OutputRegister does not always exist, so we add a TempRegister to store
the comparison result.

Change-Id: I47b2500c28be85a66cab1de669ed62401f878e1a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2885475
Auto-Submit: Liu yu <liuyu@loongson.cn>
Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#74554}
This commit is contained in:
Liu Yu 2021-05-11 21:22:36 +08:00 committed by V8 LUCI CQ
parent eb53d53bdb
commit 2dd71b3ecf
4 changed files with 16 additions and 14 deletions
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10
src/compiler/backend/mips/code-generator-mips.cc
View File

@ -877,10 +877,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
Register lhs_register = sp;
uint32_t offset;
if (ShouldApplyOffsetToStackCheck(instr, &offset)) {
lhs_register = i.TempRegister(0);
lhs_register = i.TempRegister(1);
__ Subu(lhs_register, sp, offset);
}
__ Sltu(i.OutputRegister(), i.InputRegister(0), lhs_register);
__ Sltu(i.TempRegister(0), i.InputRegister(0), lhs_register);
break;
}
case kArchStackCheckOffset:
@ -3716,9 +3716,9 @@ void AssembleBranchToLabels(CodeGenerator* gen, TurboAssembler* tasm,
cc = FlagsConditionToConditionCmp(condition);
DCHECK((cc == ls) || (cc == hi));
if (cc == ls) {
__ xori(i.OutputRegister(), i.OutputRegister(), 1);
__ xori(i.TempRegister(0), i.TempRegister(0), 1);
}
__ Branch(tlabel, ne, i.OutputRegister(), Operand(zero_reg));
__ Branch(tlabel, ne, i.TempRegister(0), Operand(zero_reg));
} else if (instr->arch_opcode() == kMipsCmpS ||
instr->arch_opcode() == kMipsCmpD) {
bool predicate;
@ -4032,7 +4032,7 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
cc = FlagsConditionToConditionCmp(condition);
DCHECK((cc == ls) || (cc == hi));
if (cc == ls) {
__ xori(i.OutputRegister(), i.OutputRegister(), 1);
__ xori(i.OutputRegister(), i.TempRegister(0), 1);
}
return;
} else {

5
src/compiler/backend/mips/instruction-selector-mips.cc
View File

@ -1634,11 +1634,12 @@ void InstructionSelector::VisitStackPointerGreaterThan(
InstructionOperand* const outputs = nullptr;
const int output_count = 0;
// TempRegister(0) is used to store the comparison result.
// Applying an offset to this stack check requires a temp register. Offsets
// are only applied to the first stack check. If applying an offset, we must
// ensure the input and temp registers do not alias, thus kUniqueRegister.
InstructionOperand temps[] = {g.TempRegister()};
const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 1 : 0);
InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()};
const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 2 : 1);
const auto register_mode = (kind == StackCheckKind::kJSFunctionEntry)
? OperandGenerator::kUniqueRegister
: OperandGenerator::kRegister;

10
src/compiler/backend/mips64/code-generator-mips64.cc
View File

@ -839,10 +839,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
Register lhs_register = sp;
uint32_t offset;
if (ShouldApplyOffsetToStackCheck(instr, &offset)) {
lhs_register = i.TempRegister(0);
lhs_register = i.TempRegister(1);
__ Dsubu(lhs_register, sp, offset);
}
__ Sltu(i.OutputRegister(), i.InputRegister(0), lhs_register);
__ Sltu(i.TempRegister(0), i.InputRegister(0), lhs_register);
break;
}
case kArchStackCheckOffset:
@ -3892,9 +3892,9 @@ void AssembleBranchToLabels(CodeGenerator* gen, TurboAssembler* tasm,
cc = FlagsConditionToConditionCmp(condition);
DCHECK((cc == ls) || (cc == hi));
if (cc == ls) {
__ xori(i.OutputRegister(), i.OutputRegister(), 1);
__ xori(i.TempRegister(0), i.TempRegister(0), 1);
}
__ Branch(tlabel, ne, i.OutputRegister(), Operand(zero_reg));
__ Branch(tlabel, ne, i.TempRegister(0), Operand(zero_reg));
} else if (instr->arch_opcode() == kMips64CmpS ||
instr->arch_opcode() == kMips64CmpD) {
bool predicate;
@ -4244,7 +4244,7 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
cc = FlagsConditionToConditionCmp(condition);
DCHECK((cc == ls) || (cc == hi));
if (cc == ls) {
__ xori(i.OutputRegister(), i.OutputRegister(), 1);
__ xori(i.OutputRegister(), i.TempRegister(0), 1);
}
return;
} else {

5
src/compiler/backend/mips64/instruction-selector-mips64.cc
View File

@ -2271,11 +2271,12 @@ void InstructionSelector::VisitStackPointerGreaterThan(
InstructionOperand* const outputs = nullptr;
const int output_count = 0;
// TempRegister(0) is used to store the comparison result.
// Applying an offset to this stack check requires a temp register. Offsets
// are only applied to the first stack check. If applying an offset, we must
// ensure the input and temp registers do not alias, thus kUniqueRegister.
InstructionOperand temps[] = {g.TempRegister()};
const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 1 : 0);
InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()};
const int temp_count = (kind == StackCheckKind::kJSFunctionEntry ? 2 : 1);
const auto register_mode = (kind == StackCheckKind::kJSFunctionEntry)
? OperandGenerator::kUniqueRegister
: OperandGenerator::kRegister;