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MIPS: [turbofan] Also optimize unsigned division by constant.

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Port r25061 (7fe697f)

TEST=cctest,mjsunit,unittests
BUG=
R=paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/701543002

Cr-Commit-Position: refs/heads/master@{#25081}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25081 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
balazs.kilvady@imgtec.com 2014-11-03 16:40:54 +00:00
parent 14e2d5d029
commit 8960f5d856
5 changed files with 34 additions and 0 deletions
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3
src/compiler/mips/code-generator-mips.cc
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@ -188,6 +188,9 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kMipsMulHigh:
__ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
break;
case kMipsMulHighU:
__ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
break;
case kMipsDiv:
__ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
break;

1
src/compiler/mips/instruction-codes-mips.h
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@ -18,6 +18,7 @@ namespace compiler {
V(MipsSubOvf) \
V(MipsMul) \
V(MipsMulHigh) \
V(MipsMulHighU) \
V(MipsDiv) \
V(MipsDivU) \
V(MipsMod) \

7
src/compiler/mips/instruction-selector-mips.cc
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@ -307,6 +307,13 @@ void InstructionSelector::VisitInt32MulHigh(Node* node) {
}
void InstructionSelector::VisitUint32MulHigh(Node* node) {
MipsOperandGenerator g(this);
Emit(kMipsMulHighU, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
g.UseRegister(node->InputAt(1)));
}
void InstructionSelector::VisitInt32Div(Node* node) {
MipsOperandGenerator g(this);
Int32BinopMatcher m(node);

22
src/mips/macro-assembler-mips.cc
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@ -740,6 +740,28 @@ void MacroAssembler::Mult(Register rs, const Operand& rt) {
}
void MacroAssembler::Mulhu(Register rd, Register rs, const Operand& rt) {
if (rt.is_reg()) {
if (!IsMipsArchVariant(kMips32r6)) {
multu(rs, rt.rm());
mfhi(rd);
} else {
muhu(rd, rs, rt.rm());
}
} else {
// li handles the relocation.
DCHECK(!rs.is(at));
li(at, rt);
if (!IsMipsArchVariant(kMips32r6)) {
multu(rs, at);
mfhi(rd);
} else {
muhu(rd, rs, at);
}
}
}
void MacroAssembler::Multu(Register rs, const Operand& rt) {
if (rt.is_reg()) {
multu(rs, rt.rm());

1
src/mips/macro-assembler-mips.h
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@ -593,6 +593,7 @@ class MacroAssembler: public Assembler {
DEFINE_INSTRUCTION(Modu);
DEFINE_INSTRUCTION(Mulh);
DEFINE_INSTRUCTION2(Mult);
DEFINE_INSTRUCTION(Mulhu);
DEFINE_INSTRUCTION2(Multu);
DEFINE_INSTRUCTION2(Div);
DEFINE_INSTRUCTION2(Divu);